From: Brian Gerst <brgerst@gmail.com>
Date: Tue, 27 Jan 2009 03:56:48 +0000 (+0900)
Subject: x86: remove extra barriers from load_gs_base()
X-Git-Tag: firefly_0821_release~13991^2~247^2~52^2~3
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=1825b8edc2034c012ae48f797d74efd1bd9d4f72;p=firefly-linux-kernel-4.4.55.git

x86: remove extra barriers from load_gs_base()

Impact: optimization

mb() generates an mfence instruction, which is not needed here.  Only
a compiler barrier is needed, and that is handled by the memory clobber
in the wrmsrl function.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
---

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 32c30b02b51f..794234eba317 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -397,10 +397,7 @@ DECLARE_PER_CPU(char *, irq_stack_ptr);
 
 static inline void load_gs_base(int cpu)
 {
-	/* Memory clobbers used to order pda/percpu accesses */
-	mb();
 	wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));
-	mb();
 }
 #endif