From: Jim Grosbach Date: Fri, 15 Oct 2010 02:29:58 +0000 (+0000) Subject: Encoding info for extension instructions. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=197a8df6405511e78265b09b6b313c30e7679094;p=oota-llvm.git Encoding info for extension instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116560 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 703bc1a094a..3942e18dfe1 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -614,6 +614,10 @@ multiclass AI_ext_rrot opcod, string opc, PatFrag opnode> { IIC_iEXTr, opc, "\t$Rd, $Rm", [(set GPR:$Rd, (opnode GPR:$Rm))]>, Requires<[IsARM, HasV6]> { + bits<4> Rd; + bits<4> Rm; + let Inst{15-12} = Rd; + let Inst{3-0} = Rm; let Inst{11-10} = 0b00; let Inst{19-16} = 0b1111; } @@ -621,8 +625,12 @@ multiclass AI_ext_rrot opcod, string opc, PatFrag opnode> { IIC_iEXTr, opc, "\t$Rd, $Rm, ror $rot", [(set GPR:$Rd, (opnode (rotr GPR:$Rm, rot_imm:$rot)))]>, Requires<[IsARM, HasV6]> { + bits<4> Rd; + bits<4> Rm; bits<2> rot; + let Inst{15-12} = Rd; let Inst{11-10} = rot; + let Inst{3-0} = Rm; let Inst{19-16} = 0b1111; } }