From: Dale Johannesen <dalej@apple.com>
Date: Mon, 31 Mar 2008 23:20:09 +0000 (+0000)
Subject: Mark functions in some tests as 'nounwind'.  Generating
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=1d3863fdbcc37f98d72408b59f6aef3243f36d7f;p=oota-llvm.git

Mark functions in some tests as 'nounwind'.  Generating
EH info for these functions causes the tests to fail for
random reasons (e.g. looking for 'or' or counting lines
with asm-printer; labels count as lines.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49003 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/PowerPC/fold-li.ll b/test/CodeGen/PowerPC/fold-li.ll
index e96bc456c56..ae336338911 100644
--- a/test/CodeGen/PowerPC/fold-li.ll
+++ b/test/CodeGen/PowerPC/fold-li.ll
@@ -3,12 +3,12 @@
 
 ;; Test that immediates are folded into these instructions correctly.
 
-define i32 @ADD(i32 %X) {
+define i32 @ADD(i32 %X) nounwind {
         %Y = add i32 %X, 65537          ; <i32> [#uses=1]
         ret i32 %Y
 }
 
-define i32 @SUB(i32 %X) {
+define i32 @SUB(i32 %X) nounwind {
         %Y = sub i32 %X, 65537          ; <i32> [#uses=1]
         ret i32 %Y
 }
diff --git a/test/CodeGen/PowerPC/reg-coalesce-simple.ll b/test/CodeGen/PowerPC/reg-coalesce-simple.ll
index dccf21e1720..2c301a9b8d1 100644
--- a/test/CodeGen/PowerPC/reg-coalesce-simple.ll
+++ b/test/CodeGen/PowerPC/reg-coalesce-simple.ll
@@ -2,7 +2,7 @@
 
 %struct.foo = type { i32, i32, [0 x i8] }
 
-define i32 @test(%struct.foo* %X) {
+define i32 @test(%struct.foo* %X) nounwind {
         %tmp1 = getelementptr %struct.foo* %X, i32 0, i32 2, i32 100            ; <i8*> [#uses=1]
         %tmp = load i8* %tmp1           ; <i8> [#uses=1]
         %tmp2 = zext i8 %tmp to i32             ; <i32> [#uses=1]
diff --git a/test/CodeGen/PowerPC/rotl-2.ll b/test/CodeGen/PowerPC/rotl-2.ll
index 1e6adb741a7..ce7a24c0b07 100644
--- a/test/CodeGen/PowerPC/rotl-2.ll
+++ b/test/CodeGen/PowerPC/rotl-2.ll
@@ -2,7 +2,7 @@
 ; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | count 2
 ; RUN: llvm-as < %s | llc -march=ppc32 | not grep or
 
-define i32 @rotl32(i32 %A, i8 %Amt) {
+define i32 @rotl32(i32 %A, i8 %Amt) nounwind {
 	%shift.upgrd.1 = zext i8 %Amt to i32		; <i32> [#uses=1]
 	%B = shl i32 %A, %shift.upgrd.1		; <i32> [#uses=1]
 	%Amt2 = sub i8 32, %Amt		; <i8> [#uses=1]
@@ -12,7 +12,7 @@ define i32 @rotl32(i32 %A, i8 %Amt) {
 	ret i32 %D
 }
 
-define i32 @rotr32(i32 %A, i8 %Amt) {
+define i32 @rotr32(i32 %A, i8 %Amt) nounwind {
 	%shift.upgrd.3 = zext i8 %Amt to i32		; <i32> [#uses=1]
 	%B = lshr i32 %A, %shift.upgrd.3		; <i32> [#uses=1]
 	%Amt2 = sub i8 32, %Amt		; <i8> [#uses=1]
@@ -22,14 +22,14 @@ define i32 @rotr32(i32 %A, i8 %Amt) {
 	ret i32 %D
 }
 
-define i32 @rotli32(i32 %A) {
+define i32 @rotli32(i32 %A) nounwind {
 	%B = shl i32 %A, 5		; <i32> [#uses=1]
 	%C = lshr i32 %A, 27		; <i32> [#uses=1]
 	%D = or i32 %B, %C		; <i32> [#uses=1]
 	ret i32 %D
 }
 
-define i32 @rotri32(i32 %A) {
+define i32 @rotri32(i32 %A) nounwind {
 	%B = lshr i32 %A, 5		; <i32> [#uses=1]
 	%C = shl i32 %A, 27		; <i32> [#uses=1]
 	%D = or i32 %B, %C		; <i32> [#uses=1]
diff --git a/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
index 96a6ca38843..6da71171e5e 100644
--- a/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
+++ b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | llc -march=x86 -stats |& \
 ; RUN:   grep asm-printer | grep 7
 
-define i32 @g(i32 %a, i32 %b) {
+define i32 @g(i32 %a, i32 %b) nounwind {
         %tmp.1 = shl i32 %b, 1          ; <i32> [#uses=1]
         %tmp.3 = add i32 %tmp.1, %a             ; <i32> [#uses=1]
         %tmp.5 = mul i32 %tmp.3, %a             ; <i32> [#uses=1]
diff --git a/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
index 1357419077f..d9ef5b0f71b 100644
--- a/test/CodeGen/X86/2006-05-02-InstrSched1.ll
+++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
@@ -5,7 +5,7 @@
 @size20 = external global i32		; <i32*> [#uses=1]
 @in5 = external global i8*		; <i8**> [#uses=1]
 
-define i32 @compare(i8* %a, i8* %b) {
+define i32 @compare(i8* %a, i8* %b) nounwind {
 	%tmp = bitcast i8* %a to i32*		; <i32*> [#uses=1]
 	%tmp1 = bitcast i8* %b to i32*		; <i32*> [#uses=1]
 	%tmp.upgrd.1 = load i32* @size20		; <i32> [#uses=1]
diff --git a/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/test/CodeGen/X86/2006-05-02-InstrSched2.ll
index 6e1610e098c..de87fc4e2bb 100644
--- a/test/CodeGen/X86/2006-05-02-InstrSched2.ll
+++ b/test/CodeGen/X86/2006-05-02-InstrSched2.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | llc -march=x86 -stats |& \
 ; RUN:   grep asm-printer | grep 13
 
-define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) {
+define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
 newFuncRoot:
 	br label %cond_true456.i
 bb459.i.exitStub:		; preds = %cond_true456.i
diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll
index 786eed7cbb2..19eface83cd 100644
--- a/test/CodeGen/X86/2006-05-11-InstrSched.ll
+++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll
@@ -2,7 +2,7 @@
 ; RUN:     grep {asm-printer} | grep 32
 
 target datalayout = "e-p:32:32"
-define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) {
+define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
 entry:
 	%tmp9 = icmp slt i32 %M, 5		; <i1> [#uses=1]
 	br i1 %tmp9, label %return, label %cond_true
diff --git a/test/CodeGen/X86/constant-pool-remat-0.ll b/test/CodeGen/X86/constant-pool-remat-0.ll
index 80077209dd9..3e07d0d0b2d 100644
--- a/test/CodeGen/X86/constant-pool-remat-0.ll
+++ b/test/CodeGen/X86/constant-pool-remat-0.ll
@@ -5,7 +5,7 @@
 
 declare fastcc float @qux(float %y)
 
-define fastcc float @array(float %a) {
+define fastcc float @array(float %a) nounwind {
   %n = mul float %a, 9.0
   %m = call fastcc float @qux(float %n)
   %o = mul float %m, 9.0
diff --git a/test/CodeGen/X86/iabs.ll b/test/CodeGen/X86/iabs.ll
index 7c23645c6a3..75de9f63795 100644
--- a/test/CodeGen/X86/iabs.ll
+++ b/test/CodeGen/X86/iabs.ll
@@ -8,7 +8,7 @@
 ;;       xorl %eax, %edi
 ;;       movl %edi, %eax
 ;;       ret
-define i32 @test(i32 %a) {
+define i32 @test(i32 %a) nounwind {
         %tmp1neg = sub i32 0, %a
         %b = icmp sgt i32 %a, -1
         %abs = select i1 %b, i32 %a, i32 %tmp1neg
diff --git a/test/CodeGen/X86/or-branch.ll b/test/CodeGen/X86/or-branch.ll
index bccba1f62d9..e6b840daba2 100644
--- a/test/CodeGen/X86/or-branch.ll
+++ b/test/CodeGen/X86/or-branch.ll
@@ -1,6 +1,6 @@
 ; RUN: llvm-as < %s | llc -march=x86 | not grep set
 
-define void @foo(i32 %X, i32 %Y, i32 %Z) {
+define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind {
 entry:
 	%tmp = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
 	%tmp.upgrd.1 = icmp eq i32 %X, 0		; <i1> [#uses=1]
diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll
index 210d5f80c22..a41b223fb2a 100644
--- a/test/CodeGen/X86/select.ll
+++ b/test/CodeGen/X86/select.ll
@@ -2,61 +2,61 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah
 ; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep set
 
-define i1 @boolSel(i1 %A, i1 %B, i1 %C) {
+define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind {
 	%X = select i1 %A, i1 %B, i1 %C		; <i1> [#uses=1]
 	ret i1 %X
 }
 
-define i8 @byteSel(i1 %A, i8 %B, i8 %C) {
+define i8 @byteSel(i1 %A, i8 %B, i8 %C) nounwind {
 	%X = select i1 %A, i8 %B, i8 %C		; <i8> [#uses=1]
 	ret i8 %X
 }
 
-define i16 @shortSel(i1 %A, i16 %B, i16 %C) {
+define i16 @shortSel(i1 %A, i16 %B, i16 %C) nounwind {
 	%X = select i1 %A, i16 %B, i16 %C		; <i16> [#uses=1]
 	ret i16 %X
 }
 
-define i32 @intSel(i1 %A, i32 %B, i32 %C) {
+define i32 @intSel(i1 %A, i32 %B, i32 %C) nounwind {
 	%X = select i1 %A, i32 %B, i32 %C		; <i32> [#uses=1]
 	ret i32 %X
 }
 
-define i64 @longSel(i1 %A, i64 %B, i64 %C) {
+define i64 @longSel(i1 %A, i64 %B, i64 %C) nounwind {
 	%X = select i1 %A, i64 %B, i64 %C		; <i64> [#uses=1]
 	ret i64 %X
 }
 
-define double @doubleSel(i1 %A, double %B, double %C) {
+define double @doubleSel(i1 %A, double %B, double %C) nounwind {
 	%X = select i1 %A, double %B, double %C		; <double> [#uses=1]
 	ret double %X
 }
 
-define i8 @foldSel(i1 %A, i8 %B, i8 %C) {
+define i8 @foldSel(i1 %A, i8 %B, i8 %C) nounwind {
 	%Cond = icmp slt i8 %B, %C		; <i1> [#uses=1]
 	%X = select i1 %Cond, i8 %B, i8 %C		; <i8> [#uses=1]
 	ret i8 %X
 }
 
-define i32 @foldSel2(i1 %A, i32 %B, i32 %C) {
+define i32 @foldSel2(i1 %A, i32 %B, i32 %C) nounwind {
 	%Cond = icmp eq i32 %B, %C		; <i1> [#uses=1]
 	%X = select i1 %Cond, i32 %B, i32 %C		; <i32> [#uses=1]
 	ret i32 %X
 }
 
-define i32 @foldSel2a(i1 %A, i32 %B, i32 %C, double %X, double %Y) {
+define i32 @foldSel2a(i1 %A, i32 %B, i32 %C, double %X, double %Y) nounwind {
 	%Cond = fcmp olt double %X, %Y		; <i1> [#uses=1]
 	%X.upgrd.1 = select i1 %Cond, i32 %B, i32 %C		; <i32> [#uses=1]
 	ret i32 %X.upgrd.1
 }
 
-define float @foldSel3(i1 %A, float %B, float %C, i32 %X, i32 %Y) {
+define float @foldSel3(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind {
 	%Cond = icmp ult i32 %X, %Y		; <i1> [#uses=1]
 	%X.upgrd.2 = select i1 %Cond, float %B, float %C		; <float> [#uses=1]
 	ret float %X.upgrd.2
 }
 
-define float @nofoldSel4(i1 %A, float %B, float %C, i32 %X, i32 %Y) {
+define float @nofoldSel4(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind {
 	%Cond = icmp slt i32 %X, %Y		; <i1> [#uses=1]
 	%X.upgrd.3 = select i1 %Cond, float %B, float %C		; <float> [#uses=1]
 	ret float %X.upgrd.3
diff --git a/test/CodeGen/X86/setuge.ll b/test/CodeGen/X86/setuge.ll
index 91f497ff759..5342b1b089c 100644
--- a/test/CodeGen/X86/setuge.ll
+++ b/test/CodeGen/X86/setuge.ll
@@ -2,7 +2,7 @@
 
 declare i1 @llvm.isunordered.f32(float, float)
 
-define float @cmp(float %A, float %B, float %C, float %D) {
+define float @cmp(float %A, float %B, float %C, float %D) nounwind {
 entry:
         %tmp.1 = fcmp uno float %A, %B          ; <i1> [#uses=1]
         %tmp.2 = fcmp oge float %A, %B          ; <i1> [#uses=1]
diff --git a/test/CodeGen/X86/x86-64-mem.ll b/test/CodeGen/X86/x86-64-mem.ll
index 8d0e26640c0..3a475789f3d 100644
--- a/test/CodeGen/X86/x86-64-mem.ll
+++ b/test/CodeGen/X86/x86-64-mem.ll
@@ -17,18 +17,18 @@
 @bsrc = internal global [500000 x i32] zeroinitializer, align 32		; <[500000 x i32]*> [#uses=0]
 @bdst = internal global [500000 x i32] zeroinitializer, align 32		; <[500000 x i32]*> [#uses=0]
 
-define void @test1() {
+define void @test1() nounwind {
 	%tmp = load i32* getelementptr ([0 x i32]* @src, i32 0, i32 0)		; <i32> [#uses=1]
 	store i32 %tmp, i32* getelementptr ([0 x i32]* @dst, i32 0, i32 0)
 	ret void
 }
 
-define void @test2() {
+define void @test2() nounwind {
 	store i32* getelementptr ([0 x i32]* @dst, i32 0, i32 0), i32** @ptr
 	ret void
 }
 
-define void @test3() {
+define void @test3() nounwind {
 	store i32* getelementptr ([500 x i32]* @ldst, i32 0, i32 0), i32** @lptr
 	br label %return
 
diff --git a/test/CodeGen/X86/zero-remat.ll b/test/CodeGen/X86/zero-remat.ll
index 9300c1239cd..5195a11bcd4 100644
--- a/test/CodeGen/X86/zero-remat.ll
+++ b/test/CodeGen/X86/zero-remat.ll
@@ -6,11 +6,11 @@
 declare void @bar(double %x)
 declare void @barf(float %x)
 
-define double @foo() {
+define double @foo() nounwind {
   call void @bar(double 0.0)
   ret double 0.0
 }
-define float @foof() {
+define float @foof() nounwind {
   call void @barf(float 0.0)
   ret float 0.0
 }