From: Chris Lattner <sabre@nondot.org>
Date: Sun, 25 Jul 2004 06:19:04 +0000 (+0000)
Subject: I think that V8 should coallesce registers, don't you?
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=1d6dc974631a8920a4e5a801a6c7cd4753ae8a8e;p=oota-llvm.git

I think that V8 should coallesce registers, don't you?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15192 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index b9ce21cf70f..64e225faf21 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SparcV8InstrInfo.h"
+#include "SparcV8.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "SparcV8GenInstrInfo.inc"
 using namespace llvm;
@@ -20,3 +21,21 @@ SparcV8InstrInfo::SparcV8InstrInfo()
   : TargetInstrInfo(SparcV8Insts, sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0])){
 }
 
+/// Return true if the instruction is a register to register move and
+/// leave the source and dest operands in the passed parameters.
+///
+bool SparcV8InstrInfo::isMoveInstr(const MachineInstr &MI,
+                                   unsigned &SrcReg, unsigned &DstReg) const {
+  if (MI.getOpcode() == V8::ORrr) {
+    if (MI.getOperand(1).getReg() == V8::G0) {  // X = or G0, Y -> X = Y
+      DstReg = MI.getOperand(0).getReg();
+      SrcReg = MI.getOperand(2).getReg();
+    }
+    return true;
+  } else if (MI.getOpcode() == V8::FMOVS) {
+    SrcReg = MI.getOperand(1).getReg();
+    DstReg = MI.getOperand(0).getReg();
+    return true;
+  }
+  return false;
+}
diff --git a/lib/Target/Sparc/SparcInstrInfo.h b/lib/Target/Sparc/SparcInstrInfo.h
index 52cd7c7f8d0..9c7838dfdd7 100644
--- a/lib/Target/Sparc/SparcInstrInfo.h
+++ b/lib/Target/Sparc/SparcInstrInfo.h
@@ -41,6 +41,12 @@ public:
   /// always be able to get register info as well (through this method).
   ///
   virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
+
+  /// Return true if the instruction is a register to register move and
+  /// leave the source and dest operands in the passed parameters.
+  ///
+  virtual bool isMoveInstr(const MachineInstr &MI,
+                           unsigned &SrcReg, unsigned &DstReg) const;
 };
 
 }
diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.cpp b/lib/Target/SparcV8/SparcV8InstrInfo.cpp
index b9ce21cf70f..64e225faf21 100644
--- a/lib/Target/SparcV8/SparcV8InstrInfo.cpp
+++ b/lib/Target/SparcV8/SparcV8InstrInfo.cpp
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SparcV8InstrInfo.h"
+#include "SparcV8.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "SparcV8GenInstrInfo.inc"
 using namespace llvm;
@@ -20,3 +21,21 @@ SparcV8InstrInfo::SparcV8InstrInfo()
   : TargetInstrInfo(SparcV8Insts, sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0])){
 }
 
+/// Return true if the instruction is a register to register move and
+/// leave the source and dest operands in the passed parameters.
+///
+bool SparcV8InstrInfo::isMoveInstr(const MachineInstr &MI,
+                                   unsigned &SrcReg, unsigned &DstReg) const {
+  if (MI.getOpcode() == V8::ORrr) {
+    if (MI.getOperand(1).getReg() == V8::G0) {  // X = or G0, Y -> X = Y
+      DstReg = MI.getOperand(0).getReg();
+      SrcReg = MI.getOperand(2).getReg();
+    }
+    return true;
+  } else if (MI.getOpcode() == V8::FMOVS) {
+    SrcReg = MI.getOperand(1).getReg();
+    DstReg = MI.getOperand(0).getReg();
+    return true;
+  }
+  return false;
+}
diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.h b/lib/Target/SparcV8/SparcV8InstrInfo.h
index 52cd7c7f8d0..9c7838dfdd7 100644
--- a/lib/Target/SparcV8/SparcV8InstrInfo.h
+++ b/lib/Target/SparcV8/SparcV8InstrInfo.h
@@ -41,6 +41,12 @@ public:
   /// always be able to get register info as well (through this method).
   ///
   virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
+
+  /// Return true if the instruction is a register to register move and
+  /// leave the source and dest operands in the passed parameters.
+  ///
+  virtual bool isMoveInstr(const MachineInstr &MI,
+                           unsigned &SrcReg, unsigned &DstReg) const;
 };
 
 }