From: Qipan Li Date: Wed, 14 Aug 2013 22:52:16 +0000 (+0800) Subject: serial: sirf: add DT-binding document to describle detailed properties X-Git-Tag: firefly_0821_release~176^2~5470^2~54 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=1ef39808ca27837017a433f94aa7055cb8490e80;p=firefly-linux-kernel-4.4.55.git serial: sirf: add DT-binding document to describle detailed properties we defined some special properties for hardware flow control, document them for DT-binding. Signed-off-by: Qipan Li Signed-off-by: Barry Song Signed-off-by: Greg Kroah-Hartman --- diff --git a/Documentation/devicetree/bindings/tty/serial/sirf-uart.txt b/Documentation/devicetree/bindings/tty/serial/sirf-uart.txt new file mode 100644 index 000000000000..a2dfc6522a91 --- /dev/null +++ b/Documentation/devicetree/bindings/tty/serial/sirf-uart.txt @@ -0,0 +1,33 @@ +* CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter * + +Required properties: +- compatible : Should be "sirf,prima2-uart" or "sirf, prima2-usp-uart" +- reg : Offset and length of the register set for the device +- interrupts : Should contain uart interrupt +- fifosize : Should define hardware rx/tx fifo size +- clocks : Should contain uart clock number + +Optional properties: +- sirf,uart-has-rtscts: we have hardware flow controller pins in hardware +- rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true +- cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true + +Example: + +uart0: uart@b0050000 { + cell-index = <0>; + compatible = "sirf,prima2-uart"; + reg = <0xb0050000 0x1000>; + interrupts = <17>; + fifosize = <128>; + clocks = <&clks 13>; +}; + +On the board-specific dts, we can put rts-gpios and cts-gpios like + +usp@b0090000 { + compatible = "sirf,prima2-usp-uart"; + sirf,uart-has-rtscts; + rts-gpios = <&gpio 15 0>; + cts-gpios = <&gpio 46 0>; +};