From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Wed, 16 Mar 2011 23:35:25 +0000 (+0000)
Subject: Merge branch 'misc' into devel
X-Git-Tag: firefly_0821_release~7613^2~2191^2~2
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=1f0090a1eaa1b750a2fc5c99c91b790d5322a1fd;p=firefly-linux-kernel-4.4.55.git

Merge branch 'misc' into devel

Conflicts:
	arch/arm/Kconfig
---

1f0090a1eaa1b750a2fc5c99c91b790d5322a1fd
diff --cc arch/arm/Kconfig
index 38bf684448e7,f871f2e1dd7c..1fd3f280b584
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -1176,6 -1162,6 +1174,17 @@@ config ARM_ERRATA_72078
  	  tables. The workaround changes the TLB flushing routines to invalidate
  	  entries regardless of the ASID.
  
++config PL310_ERRATA_727915
++	bool "Background Clean & Invalidate by Way operation can cause data corruption"
++	depends on CACHE_L2X0
++	help
++	  PL310 implements the Clean & Invalidate by Way L2 cache maintenance
++	  operation (offset 0x7FC). This operation runs in background so that
++	  PL310 can handle normal accesses while it is in progress. Under very
++	  rare circumstances, due to this erratum, write data can be lost when
++	  PL310 treats a cacheable write transaction during a Clean &
++	  Invalidate by Way operation.
++
  config ARM_ERRATA_743622
  	bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  	depends on CPU_V7