From: Jay Cheng Date: Fri, 20 Aug 2010 00:04:36 +0000 (-0700) Subject: [ARM] tegra: stingray: change uartc clock source to pll_m. X-Git-Tag: firefly_0821_release~9834^2~682 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=1f4b0832806a6a2361255d0350c9e6d8c0ce5b01;p=firefly-linux-kernel-4.4.55.git [ARM] tegra: stingray: change uartc clock source to pll_m. With PLL_M (600Mhz) as clock source, it produces the closest 3M baud rate required by BT module. Change-Id: I9a33f415a8a13fbb68589d5b2575f7c7beab5c44 Signed-off-by: Jay Cheng --- diff --git a/arch/arm/mach-tegra/board-stingray.c b/arch/arm/mach-tegra/board-stingray.c index 8f836928d211..18959192a118 100644 --- a/arch/arm/mach-tegra/board-stingray.c +++ b/arch/arm/mach-tegra/board-stingray.c @@ -593,7 +593,7 @@ static struct tegra_i2c_platform_data stingray_i2c4_platform_data = { static __initdata struct tegra_clk_init_table stingray_clk_init_table[] = { /* name parent rate enabled */ { "uartb", "clk_m", 26000000, true}, - { "uartc", "pll_p", 216000000, false}, + { "uartc", "pll_m", 600000000, false}, /*{ "emc", "pll_p", 0, true}, { "pll_m", NULL, 600000000, true}, { "emc", "pll_m", 600000000, false},*/