From: Chris Lattner Date: Sun, 18 Dec 2005 23:10:57 +0000 (+0000) Subject: Add support for undef X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=20ad53ffd770a4012dcb3be7ee1a393d30337c4e;p=oota-llvm.git Add support for undef git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24839 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 377543b091b..bdcb1a2457a 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -111,7 +111,13 @@ def ADJCALLSTACKDOWN : Pseudo<(ops i32imm:$amt), def ADJCALLSTACKUP : Pseudo<(ops i32imm:$amt), "!ADJCALLSTACKUP $amt", [(callseq_end imm:$amt)]>; -def IMPLICIT_DEF : Pseudo<(ops IntRegs:$dst), "!IMPLICIT_DEF $dst", []>; +def IMPLICIT_DEF_Int : Pseudo<(ops IntRegs:$dst), + "!IMPLICIT_DEF $dst", + [(set IntRegs:$dst, (undef))]>; +def IMPLICIT_DEF_FP : Pseudo<(ops FPRegs:$dst), "!IMPLICIT_DEF $dst", + [(set FPRegs:$dst, (undef))]>; +def IMPLICIT_DEF_DFP : Pseudo<(ops DFPRegs:$dst), "!IMPLICIT_DEF $dst", + [(set DFPRegs:$dst, (undef))]>; def FpMOVD : Pseudo<(ops DFPRegs:$dst, DFPRegs:$src), "!FpMOVD", []>; // pseudo 64-bit double move diff --git a/lib/Target/Sparc/SparcV8ISelSimple.cpp b/lib/Target/Sparc/SparcV8ISelSimple.cpp index f3c0d6e9711..e0fe4e1642e 100644 --- a/lib/Target/Sparc/SparcV8ISelSimple.cpp +++ b/lib/Target/Sparc/SparcV8ISelSimple.cpp @@ -243,9 +243,9 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB, abort(); } } else if (isa(C)) { - BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R); + BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R); if (getClassB (C->getType ()) == cLong) - BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R+1); + BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R+1); return; } @@ -341,15 +341,15 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) { case cShort: case cInt: case cFloat: - BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]); + BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]); break; case cDouble: case cLong: // Double and Long use register pairs. - BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]); + BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]); ++ArgNo; if (ArgNo < 6) - BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]); + BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]); break; default: assert (0 && "type not handled"); diff --git a/lib/Target/SparcV8/SparcV8ISelSimple.cpp b/lib/Target/SparcV8/SparcV8ISelSimple.cpp index f3c0d6e9711..e0fe4e1642e 100644 --- a/lib/Target/SparcV8/SparcV8ISelSimple.cpp +++ b/lib/Target/SparcV8/SparcV8ISelSimple.cpp @@ -243,9 +243,9 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB, abort(); } } else if (isa(C)) { - BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R); + BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R); if (getClassB (C->getType ()) == cLong) - BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R+1); + BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R+1); return; } @@ -341,15 +341,15 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) { case cShort: case cInt: case cFloat: - BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]); + BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]); break; case cDouble: case cLong: // Double and Long use register pairs. - BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]); + BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]); ++ArgNo; if (ArgNo < 6) - BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]); + BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]); break; default: assert (0 && "type not handled"); diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td index 377543b091b..bdcb1a2457a 100644 --- a/lib/Target/SparcV8/SparcV8InstrInfo.td +++ b/lib/Target/SparcV8/SparcV8InstrInfo.td @@ -111,7 +111,13 @@ def ADJCALLSTACKDOWN : Pseudo<(ops i32imm:$amt), def ADJCALLSTACKUP : Pseudo<(ops i32imm:$amt), "!ADJCALLSTACKUP $amt", [(callseq_end imm:$amt)]>; -def IMPLICIT_DEF : Pseudo<(ops IntRegs:$dst), "!IMPLICIT_DEF $dst", []>; +def IMPLICIT_DEF_Int : Pseudo<(ops IntRegs:$dst), + "!IMPLICIT_DEF $dst", + [(set IntRegs:$dst, (undef))]>; +def IMPLICIT_DEF_FP : Pseudo<(ops FPRegs:$dst), "!IMPLICIT_DEF $dst", + [(set FPRegs:$dst, (undef))]>; +def IMPLICIT_DEF_DFP : Pseudo<(ops DFPRegs:$dst), "!IMPLICIT_DEF $dst", + [(set DFPRegs:$dst, (undef))]>; def FpMOVD : Pseudo<(ops DFPRegs:$dst, DFPRegs:$src), "!FpMOVD", []>; // pseudo 64-bit double move