From: Rabin Vincent <rabin.vincent@stericsson.com>
Date: Wed, 8 Dec 2010 11:48:46 +0000 (+0530)
Subject: ux500: fix 5500 PER6 clock rate
X-Git-Tag: firefly_0821_release~7613^2~3117^2^2~1^2~18
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=20e218a77fc0b0576817b6b204fe5b9391a5b209;p=firefly-linux-kernel-4.4.55.git

ux500: fix 5500 PER6 clock rate

The DB5500 PER6 clock rate is the same as the DB8500 one, i.e. 133.33 MHz.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
---

diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 598902da31d8..00e9ab304ca7 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -578,7 +578,6 @@ int __init clk_init(void)
 		/* Clock tree for U5500 not implemented yet */
 		clk_prcc_ops.enable = clk_prcc_ops.disable = NULL;
 		clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL;
-		clk_per6clk.rate = 26000000;
 		clk_uartclk.rate = 36360000;
 		clk_sdmmcclk.rate = 99900000;
 	}