From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 12 Apr 2017 08:13:10 +0000 (+0800)
Subject: arm64: dts: rk3368: add leakage-voltage-sel property for cpu opp table
X-Git-Tag: release-20171130_firefly~4^2~798
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=236c3e6f48d3233c396544eff7da91243aaf2ea4;p=firefly-linux-kernel-4.4.55.git

arm64: dts: rk3368: add leakage-voltage-sel property for cpu opp table

Change-Id: I5f72c3cd59216723018a021b77081f9fbd630b0e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 7fb16c5e4ba3..f3f3ba0ffe82 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -216,6 +216,12 @@
 	cluster0_opp: opp_table0 {
 		compatible = "operating-points-v2";
 		opp-shared;
+		leakage-voltage-sel = <
+			1   24   0
+			25  254  1
+		>;
+		nvmem-cells = <&cpu_leakage>;
+		nvmem-cell-names = "cpu_leakage";
 
 		opp@216000000 {
 			opp-hz = /bits/ 64 <216000000>;
@@ -253,6 +259,12 @@
 	cluster1_opp: opp_table1 {
 		compatible = "operating-points-v2";
 		opp-shared;
+		leakage-voltage-sel = <
+			1   24   0
+			25  254  1
+		>;
+		nvmem-cells = <&cpu_leakage>;
+		nvmem-cell-names = "cpu_leakage";
 
 		opp@216000000 {
 			opp-hz = /bits/ 64 <216000000>;