From: Dale Johannesen Date: Fri, 15 Jan 2010 22:22:35 +0000 (+0000) Subject: DEBUG_VALUE is now variable sized, as it has a X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=23cdb0bdcf8e7ded8ee5017592b6face579a2a7f;p=oota-llvm.git DEBUG_VALUE is now variable sized, as it has a target-dependent memory address representation in it. Restore X86 printing of DEBUG_VALUE; lowering is done in X86RegisterInfo using the normal algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93565 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 206e42e7d93..354e7438b1f 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -479,7 +479,7 @@ def COPY_TO_REGCLASS : Instruction { } def DEBUG_VALUE : Instruction { let OutOperandList = (ops); - let InOperandList = (ops unknown:$value, i64imm:$offset, unknown:$meta); + let InOperandList = (ops variable_ops); let AsmString = "DEBUG_VALUE"; let Namespace = "TargetInstrInfo"; let isAsCheapAsAMove = 1; diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp index a4939af1b8e..931d66287c7 100644 --- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp +++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp @@ -25,6 +25,7 @@ #include "llvm/Support/FormattedStream.h" #include "llvm/Support/Mangler.h" #include "llvm/ADT/SmallString.h" +#include "llvm/Analysis/DebugInfo.h" using namespace llvm; @@ -420,6 +421,29 @@ void X86AsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) { case TargetInstrInfo::GC_LABEL: printLabel(MI); return; + case TargetInstrInfo::DEBUG_VALUE: { + if (!VerboseAsm) + return; + O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: "; + unsigned NOps = MI->getNumOperands(); + // cast away const; DIetc do not take const operands for some reason + DIVariable V((MDNode*)(MI->getOperand(NOps-1).getMetadata())); + O << V.getName(); + O << " <- "; + if (NOps==3) { + // Variable is in register + assert(MI->getOperand(0).getType()==MachineOperand::MO_Register); + printOperand(MI, 0); + } else { + // Frame address. Currently handles ESP or ESP + offset only + assert(MI->getOperand(0).getType()==MachineOperand::MO_Register); + assert(MI->getOperand(3).getType()==MachineOperand::MO_Immediate); + O << '['; printOperand(MI, 0); O << '+'; printOperand(MI, 3); O << ']'; + } + O << "+"; + printOperand(MI, NOps-2); + return; + } case TargetInstrInfo::INLINEASM: printInlineAsm(MI); return;