From: Roshan Pius Date: Mon, 2 Feb 2015 22:55:38 +0000 (-0800) Subject: usb: dwc2: Fix a bug in reading the endpoint directions from reg. X-Git-Tag: firefly_0821_release~176^2~2323^2^2~1 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=251a17f5aff990ab117590df2a13ef032464c0d3;p=firefly-linux-kernel-4.4.55.git usb: dwc2: Fix a bug in reading the endpoint directions from reg. According to the DWC2 datasheet, the HWCFG1 register stores the configured endpoint directions for endpoints 0-15 in bit positions 0-31. ========================== Endpoint Direction (EpDir) This 32-bit field uses two bits per endpoint to determine the endpoint direction. Endpoint Bits [31:30]: Endpoint 15 direction Bits [29:28]: Endpoint 14 direction .... Bits [3:2]: Endpoint 1 direction Bits[1:0]: Endpoint 0 direction (always BIDIR) ========================== The DWC2 driver is currently interpreting the contents of the register as directions for endpoints 1-15 which leads to an error in determining the configured endpoint directions in the core because the first 2 bits determine the direction of endpoint 0 and not 1. This is based on testing/next branch in Felipe's git. Signed-off-by: Roshan Pius Acked-by: John Youn Signed-off-by: Felipe Balbi --- diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 15aa5785090b..6a30887082cd 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c @@ -3308,7 +3308,7 @@ static int s3c_hsotg_hw_cfg(struct dwc2_hsotg *hsotg) hsotg->eps_out[0] = hsotg->eps_in[0]; cfg = readl(hsotg->regs + GHWCFG1); - for (i = 1; i < hsotg->num_of_eps; i++, cfg >>= 2) { + for (i = 1, cfg >>= 2; i < hsotg->num_of_eps; i++, cfg >>= 2) { ep_type = cfg & 3; /* Direction in or both */ if (!(ep_type & 2)) {