From: Alkis Evlogimenos <alkis@evlogimenos.com>
Date: Mon, 5 Jan 2004 02:25:45 +0000 (+0000)
Subject: Currently we cannot handle two-address instructions of the form:
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=271bd2d7f1c8dca9906a9b9b9d3081b9040e2f48;p=oota-llvm.git

Currently we cannot handle two-address instructions of the form:
A = B op C where A == C, but this cannot really occur in practice
because of SSA form. Add an assert to check that just to be safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10682 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 41b3cbd8ed1..b758e7fd224 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -123,6 +123,15 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &fn) {
             bool regAisPhysical = regA < MRegisterInfo::FirstVirtualRegister;
             bool regBisPhysical = regB < MRegisterInfo::FirstVirtualRegister;
 
+            // first make sure we do not have a use of a in the
+            // instruction (a = b + a for example) because our
+            // transofrmation will not work. This should never occur
+            // because of SSA.
+            for (unsigned i = 1; i < mi->getNumOperands(); ++i) {
+                assert(!mi->getOperand(i).isRegister() ||
+                       mi->getOperand(i).getAllocatedRegNum() != regA);
+            }
+
             const TargetRegisterClass* rc = regAisPhysical ?
                 mri_->getRegClass(regA) :
                 mf_->getSSARegMap()->getRegClass(regA);