From: Ulrich Weigand Date: Thu, 8 Oct 2015 17:46:59 +0000 (+0000) Subject: [SystemZ] Fix another assertion failure in tryBuildVectorShuffle X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=27c5c326238b4c1c42442a2f391466eeb903b749;p=oota-llvm.git [SystemZ] Fix another assertion failure in tryBuildVectorShuffle This fixes yet another scenario where tryBuildVectorShuffle would attempt to create a BUILD_VECTOR node with an invalid combination of types. This can happen if the incoming BUILD_VECTOR has elements of a type different from the vector element type, which is allowed in certain cases as long as they are all the same type. When one of these elements is used in the residual vector, and UNDEF elements are added to fill up the residual vector, those UNDEFs then have to use the type of the original element, not the vector element type, or else the resulting BUILD_VECTOR will have an invalid type combination. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249706 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index 64466a6d852..2a2be6563be 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -3908,7 +3908,7 @@ static SDValue tryBuildVectorShuffle(SelectionDAG &DAG, // Create the BUILD_VECTOR for the remaining elements, if any. if (!ResidueOps.empty()) { while (ResidueOps.size() < NumElements) - ResidueOps.push_back(DAG.getUNDEF(VT.getVectorElementType())); + ResidueOps.push_back(DAG.getUNDEF(ResidueOps[0].getValueType())); for (auto &Op : GS.Ops) { if (!Op.getNode()) { Op = DAG.getNode(ISD::BUILD_VECTOR, SDLoc(BVN), VT, ResidueOps); diff --git a/test/CodeGen/SystemZ/vec-perm-13.ll b/test/CodeGen/SystemZ/vec-perm-13.ll new file mode 100644 index 00000000000..708d8de53f8 --- /dev/null +++ b/test/CodeGen/SystemZ/vec-perm-13.ll @@ -0,0 +1,38 @@ +; Test vector shuffles on vectors with implicitly extended elements +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | \ +; RUN: FileCheck -check-prefix=CHECK-CODE %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | \ +; RUN: FileCheck -check-prefix=CHECK-VECTOR %s + +define <4 x i16> @f1(<4 x i16> %x) { +; CHECK-CODE-LABEL: f1: +; CHECK-CODE: larl [[REG:%r[0-5]]], +; CHECK-CODE: vl [[MASK:%v[0-9]+]], 0([[REG]]) +; CHECK-CODE: vgbm [[ELT:%v[0-9]+]], 0 +; CHECK-CODE: vperm %v24, %v24, [[ELT]], [[MASK]] +; CHECK-CODE: br %r14 + +; CHECK-VECTOR: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .byte 6 +; CHECK-VECTOR-NEXT: .byte 7 +; CHECK-VECTOR-NEXT: .byte 16 +; CHECK-VECTOR-NEXT: .byte 17 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 +; CHECK-VECTOR-NEXT: .space 1 + + %elt = extractelement <4 x i16> %x, i32 3 + %vec1 = insertelement <4 x i16> undef, i16 %elt, i32 2 + %vec2 = insertelement <4 x i16> %vec1, i16 0, i32 3 + ret <4 x i16> %vec2 +} +