From: Andrew Lenharth <andrewl@lenharth.org>
Date: Thu, 7 Apr 2005 18:15:28 +0000 (+0000)
Subject: fix a small optimization opertunity and make gcc happy
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=2966e84a8decc161fdd21f449a7014c7bbccf4f0;p=oota-llvm.git

fix a small optimization opertunity and make gcc happy


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21143 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index cfd58757317..381ecdd7b92 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1090,7 +1090,7 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
 
 unsigned ISel::SelectExpr(SDOperand N) {
   unsigned Result;
-  unsigned Tmp1, Tmp2, Tmp3;
+  unsigned Tmp1, Tmp2 = 0, Tmp3;
   unsigned Opc = 0;
   unsigned opcode = N.getOpcode();
 
@@ -1448,7 +1448,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
                 Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
 
               Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
-              Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
               BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
             }
             return Result;
@@ -1810,7 +1809,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
       {
         unsigned k = ExactLog2(abs(CSD->getSignExtended()));
         Tmp1 = SelectExpr(N.getOperand(0));
-        Tmp2 = MakeReg(MVT::i64);
         if (k == 1)
           Tmp2 = Tmp1;
         else