From: Dale Johannesen <dalej@apple.com>
Date: Sun, 14 Nov 2010 18:14:32 +0000 (+0000)
Subject: Segregate tests by target.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=2ae2302abc9d1e57dc6476603616e9f6722a5f6e;p=oota-llvm.git

Segregate tests by target.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119050 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
new file mode 100644
index 00000000000..31e4f136e1c
--- /dev/null
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -0,0 +1,117 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
+
+# CHECK:	b	#0
+0xfe 0xff 0xff 0xea
+
+# CHECK:	bfc	r8, #0, #16
+0x1f 0x80 0xcf 0xe7
+
+# CHECK:	bfi	r8, r0, #16, #1
+0x10 0x88 0xd0 0xe7
+
+# CHECK:	cmn	r0, #1
+0x01 0x00 0x70 0xe3
+
+# CHECK:	dmb
+0x5f 0xf0 0x7f 0xf5
+
+# CHECK:	dmb	nshst
+0x56 0xf0 0x7f 0xf5
+
+# CHECK:	dsb
+0x4f 0xf0 0x7f 0xf5
+
+# CHECK:	dsb	st
+0x4e 0xf0 0x7f 0xf5
+
+# CHECK:	isb
+0x6f 0xf0 0x7f 0xf5
+
+# CHECK:	ldclvc	p5, cr15, [r8], #-0
+0x00 0xf5 0x78 0x7c
+
+# CHECK:	ldr	r0, [r2], #15
+0x0f 0x00 0x92 0xe4
+
+# CHECK:	ldrh	r0, [r2], #0
+0xb0 0x00 0xd2 0xe0
+
+# CHECK:	ldrht	r0, [r2], #15
+0xbf 0x00 0xf2 0xe0
+
+# CHECK:	ldrsbtvs	lr, [r2], -r9
+0xd9 0xe9 0x32 0x60
+
+# CHECK:	lsls	r0, r2, #31
+0x82 0x0f 0xb0 0xe1
+
+# CHECK:	mcr2	p0, #0, r2, cr1, cr0, #7
+0xf0 0x20 0x01 0xfe
+
+# CHECK:	movt	r8, #65535
+0xff 0x8f 0x4f 0xe3
+
+# CHECK:	mvnspl	r7, #245, 2
+0xf5 0x71 0xf0 0x53
+
+# CHECK-NOT:	orr	r7, r8, r7, rrx #0
+# CHECK:	orr	r7, r8, r7, rrx
+0x67 0x70 0x88 0xe1
+
+# CHECK:	pkhbt	r8, r9, r10, lsl #4
+0x1a 0x82 0x89 0xe6
+
+# CHECK-NOT:	pkhbtls	pc, r11, r11, lsl #0
+# CHECK:	pkhbtls	pc, r11, r11
+0x1b 0xf0 0x8b 0x96
+
+# CHECK:	pop	{r0, r2, r4, r6, r8, r10}
+0x55 0x05 0xbd 0xe8
+
+# CHECK:	push	{r0, r2, r4, r6, r8, r10}
+0x55 0x05 0x2d 0xe9
+
+# CHECK:	qsax	r8, r9, r10
+0x5a 0x8f 0x29 0xe6
+
+# CHECK:	rfedb	r0!
+0x00 0x0a 0x30 0xf9
+
+# CHECK-NOT:	rsbeq	r0, r2, r0, lsl #0
+# CHECK:	rsbeq	r0, r2, r0
+0x00 0x00 0x62 0x00
+
+# CHECK-NOT:	rscseq	r0, r0, r1, lsl #0
+# CHECK:	rscseq	r0, r0, r1
+0x01 0x00 0xf0 0x00
+
+# CHECK:	sbcs	r0, pc, #1
+0x01 0x00 0xdf 0xe2
+
+# CHECK:	sbfx	r0, r1, #0, #8
+0x51 0x00 0xa7 0xe7
+
+# CHECK:	ssat	r8, #1, r10, lsl #8
+0x1a 0x84 0xa0 0xe6
+
+# CHECK-NOT:	ssatmi	r0, #17, r12, lsl #0
+# CHECK:	ssatmi	r0, #17, r12
+0x1c 0x00 0xb0 0x46
+
+# CHECK:	stmdb	r10!, {r4, r5, r6, r7, lr}
+0xf0 0x40 0x2a 0xe9
+
+# CHECK:	teq	r0, #31
+0x1f 0x00 0x30 0xe3
+
+# CHECK:	ubfx	r0, r0, #16, #1
+0x50 0x08 0xe0 0xe7
+
+# CHECK:	usat	r8, #0, r10, asr #32
+0x5a 0x80 0xe0 0xe6
+
+# CHECK:        setend be
+0x00 0x02 0x01 0xf1
+
+# CHECK:        setend le
+0x00 0x00 0x01 0xf1
diff --git a/test/MC/Disassembler/ARM/dg.exp b/test/MC/Disassembler/ARM/dg.exp
new file mode 100644
index 00000000000..fc2f17a6fba
--- /dev/null
+++ b/test/MC/Disassembler/ARM/dg.exp
@@ -0,0 +1,6 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target ARM] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]]
+}
+
diff --git a/test/MC/Disassembler/ARM/neon-tests.txt b/test/MC/Disassembler/ARM/neon-tests.txt
new file mode 100644
index 00000000000..eb9adb7b6c2
--- /dev/null
+++ b/test/MC/Disassembler/ARM/neon-tests.txt
@@ -0,0 +1,61 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
+
+# CHECK:	vbif	q15, q7, q0
+0x50 0xe1 0x7e 0xf3
+
+# CHECK:	vcvt.f32.s32	q15, q0, #1
+0x50 0xee 0xff 0xf2
+
+# CHECK:	vdup.32	q3, d1[0]
+0x41 0x6c 0xb4 0xf3
+
+# CHECK:	vld1.8	{d17, d18}, [r6], r5
+0x05 0x1a 0x66 0xf4
+
+# CHECK:        vld1.8  {d17, d18, d19}, [r6], r5
+0x05 0x16 0x66 0xf4
+
+# CHECK:	vld4.8	{d0, d1, d2, d3}, [r2], r7
+0x07 0x00 0x22 0xf4
+
+# CHECK:	vld4.8	{d4, d6, d8, d10}, [r2]
+0x0f 0x41 0x22 0xf4
+
+# CHECK:	vmov	d0, d15
+0x1f 0x01 0x2f 0xf2
+
+# CHECK:	vmov.i64	q6, #0xFF00FF00FF
+0x75 0xce 0x81 0xf2
+
+# CHECK:	vmvn.i32	d0, #0x0
+0x30 0x00 0x80 0xf2
+
+# CHECK:	vmul.f32	d0, d0, d6
+0x16 0x0d 0x00 0xf3
+
+# CHECK:	vneg.f32	q0, q0
+0xc0 0x07 0xb9 0xf3
+
+# CHECK:	vqrdmulh.s32	d0, d0, d3[1]
+0x63 0x0d 0xa0 0xf2
+
+# CHECK:	vrshr.s32	d0, d0, #16
+0x10 0x02 0xb0 0xf2
+
+# CHECK:	vshll.i16	q3, d1, #16
+0x01 0x63 0xb6 0xf3
+
+# CHECK:	vsri.32	q15, q0, #1
+0x50 0xe4 0xff 0xf3
+
+# CHECK:	vtbx.8	d18, {d4, d5, d6}, d7
+0x47 0x2a 0xf4 0xf3
+
+# CHECK: vmov.f32 s0, #5.000000e-01
+0x00 0x0a 0xb6 0xee
+
+# CHECK: vmov.f32 s0, #1.328125e-01
+0x01 0x0a 0xb4 0xee
+
+# CHECK: vmov.f64 d0, #5.000000e-01
+0x00 0x0b 0xb6 0xee
diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt
new file mode 100644
index 00000000000..06d12fed87f
--- /dev/null
+++ b/test/MC/Disassembler/ARM/thumb-tests.txt
@@ -0,0 +1,105 @@
+# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 | FileCheck %s
+
+# CHECK:	add	r5, sp, #68
+0x11 0xad
+
+# CHECK:	adcs	r0, r0, #1
+0x50 0xf1 0x01 0x00
+
+# CHECK:	b	#34
+0x0f 0xe0
+
+# CHECK:	b.w	#-12
+0xff 0xf7 0xf8 0xaf
+
+# CHECK:	bfi	r2, r10, #0, #1
+0x6a 0xf3 0x00 0x02
+
+# CHECK:	cbnz	r7, #20
+0x57 0xb9
+
+# CHECK:	cmp	r3, r4
+0xa3 0x42
+
+# CHECK:	cmn.w	r0, #31
+0x10 0xf1 0x1f 0x0f
+
+# CHECK:	ldmia	r0!, {r1}
+0x02 0xc8
+
+# CHECK:	ldrb.w	r8, #-24
+0x1f 0xf8 0x18 0x80
+
+# CHECK:	ldrd	r0, r1, [r7, #64]!
+0xf7 0xe9 0x10 0x01
+
+# CHECK:	lsls.w	r0, pc, #1
+0x5f 0xea 0x4f 0x00
+
+# CHECK:	mov	r11, r7
+0xbb 0x46
+
+# CHECK:	pkhtb	r2, r4, r6, asr #16
+0xc4 0xea 0x26 0x42
+
+# CHECK-NOT:	pkhbt	r2, r4, r6, lsl #0
+# CHECK:	pkhbt	r2, r4, r6
+0xc4 0xea 0x06 0x02
+
+# CHECK:	pop	{r2, r4, r6, r8, r10, r12}
+0xbd 0xe8 0x54 0x15
+
+# CHECK:	push	{r2, r4, r6, r8, r10, r12}
+0x2d 0xe9 0x54 0x15
+
+# CHECK:	rsbs	r0, r0, #0
+0x40 0x42
+
+# CHECK-NOT:	rsb	r0, r2, r0, lsl #0
+# CHECK:	rsb	r0, r2, r0
+0xc2 0xeb 0x00 0x00
+
+# CHECK-NOT:	ssat	r0, #17, r12, lsl #0
+# CHECK:	ssat	r0, #17, r12
+0x0c 0xf3 0x10 0x00
+
+# CHECK:	strd	r0, [r7, #64]
+0xc7 0xe9 0x10 0x01
+
+# CHECK:	sub	sp, #60
+0x8f 0xb0
+
+# CHECK:	subw	r0, pc, #1
+0xaf 0xf2 0x01 0x00
+
+# CHECK:	subw	r0, sp, #835
+0xad 0xf2 0x43 0x30
+
+# CHECK:	uqadd16	r3, r4, r5
+0x94 0xfa 0x55 0xf3
+
+# CHECK:	usada8	r5, r4, r3, r2
+0x74 0xfb 0x03 0x25
+
+# CHECK:	uxtab16	r1, r2, r3, ror #8
+0x32 0xfa 0x93 0xf1
+
+# IT block begin
+# CHECK:	ittte	eq
+0x03 0xbf
+
+# CHECK:	moveq	r3, #3
+0x03 0x23
+
+# CHECK:	asreq	r1, r0, #5
+0x41 0x11
+
+# CHECK:	lsleq	r1, r0, #28
+0x01 0x07
+
+# CHECK:	stmiane	r0!, {r1, r2, r3}
+0x0e 0xc0
+
+# IT block end
+# CHECK:	rsbs	r1, r2, #0
+0x51 0x42
diff --git a/test/MC/Disassembler/MBlaze/dg.exp b/test/MC/Disassembler/MBlaze/dg.exp
new file mode 100644
index 00000000000..0be99a34235
--- /dev/null
+++ b/test/MC/Disassembler/MBlaze/dg.exp
@@ -0,0 +1,6 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target MBlaze] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]]
+}
+
diff --git a/test/MC/Disassembler/MBlaze/mblaze-tests.txt b/test/MC/Disassembler/MBlaze/mblaze-tests.txt
new file mode 100644
index 00000000000..224473f29c7
--- /dev/null
+++ b/test/MC/Disassembler/MBlaze/mblaze-tests.txt
@@ -0,0 +1,1079 @@
+# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s
+
+################################################################################
+# Branch instructions
+################################################################################
+
+# CHECK:    beq     r2, r3
+0x9c 0x02 0x18 0x00
+
+# CHECK:    bge     r2, r3
+0x9c 0xa2 0x18 0x00
+
+# CHECK:    bgt     r2, r3
+0x9c 0x82 0x18 0x00
+
+# CHECK:    ble     r2, r3
+0x9c 0x62 0x18 0x00
+
+# CHECK:    blt     r2, r3
+0x9c 0x42 0x18 0x00
+
+# CHECK:    bne     r2, r3
+0x9c 0x22 0x18 0x00
+
+# CHECK:    beqd    r2, r3
+0x9e 0x02 0x18 0x00
+
+# CHECK:    bged    r2, r3
+0x9e 0xa2 0x18 0x00
+
+# CHECK:    bgtd    r2, r3
+0x9e 0x82 0x18 0x00
+
+# CHECK:    bled    r2, r3
+0x9e 0x62 0x18 0x00
+
+# CHECK:    bltd    r2, r3
+0x9e 0x42 0x18 0x00
+
+# CHECK:    bned    r2, r3
+0x9e 0x22 0x18 0x00
+
+# CHECK:    br      r3
+0x98 0x00 0x18 0x00
+
+# CHECK:    bra     r3
+0x98 0x08 0x18 0x00
+
+# CHECK:    brd     r3
+0x98 0x10 0x18 0x00
+
+# CHECK:    brad    r3
+0x98 0x18 0x18 0x00
+
+# CHECK:    brld    r15, r3
+0x99 0xf4 0x18 0x00
+
+# CHECK:    brald   r15, r3
+0x99 0xfc 0x18 0x00
+
+# CHECK:    brk     r15, r3
+0x99 0xec 0x18 0x00
+
+# CHECK:    beqi    r2, 0
+0xbc 0x02 0x00 0x00
+
+# CHECK:    bgei    r2, 0
+0xbc 0xa2 0x00 0x00
+
+# CHECK:    bgti    r2, 0
+0xbc 0x82 0x00 0x00
+
+ # CHECK:   blei    r2, 0
+0xbc 0x62 0x00 0x00
+
+# CHECK:    blti    r2, 0
+0xbc 0x42 0x00 0x00
+
+# CHECK:    bnei    r2, 0
+0xbc 0x22 0x00 0x00
+
+# CHECK:    beqid   r2, 0
+0xbe 0x02 0x00 0x00
+
+# CHECK:    bgeid   r2, 0
+0xbe 0xa2 0x00 0x00
+
+# CHECK:    bgtid   r2, 0
+0xbe 0x82 0x00 0x00
+
+# CHECK:    bleid   r2, 0
+0xbe 0x62 0x00 0x00
+
+# CHECK:    bltid   r2, 0
+0xbe 0x42 0x00 0x00
+
+# CHECK:    bneid   r2, 0
+0xbe 0x22 0x00 0x00
+
+# CHECK:    bri     0
+0xb8 0x00 0x00 0x00
+
+# CHECK:    brai    0
+0xb8 0x08 0x00 0x00
+
+# CHECK:    brid    0
+0xb8 0x10 0x00 0x00
+
+# CHECK:    braid   0
+0xb8 0x18 0x00 0x00
+
+# CHECK:    brlid   r15, 0
+0xb9 0xf4 0x00 0x00
+
+# CHECK:    bralid  r15, 0
+0xb9 0xfc 0x00 0x00
+
+# CHECK:    brki    r15, 0
+0xb9 0xec 0x00 0x00
+
+################################################################################
+# TYPE A instructions
+################################################################################
+
+# CHECK:    add     r1, r2, r3
+0x00 0x22 0x18 0x00
+
+# CHECK:    addc    r1, r2, r3
+0x08 0x22 0x18 0x00
+
+# CHECK:    addk    r1, r2, r3
+0x10 0x22 0x18 0x00
+
+# CHECK:    addkc   r1, r2, r3
+0x18 0x22 0x18 0x00
+
+# CHECK:    and     r1, r2, r3
+0x84 0x22 0x18 0x00
+
+# CHECK:    andn    r1, r2, r3
+0x8c 0x22 0x18 0x00
+
+# CHECK:    cmp     r1, r2, r3
+0x14 0x22 0x18 0x01
+
+# CHECK:    cmpu    r1, r2, r3
+0x14 0x22 0x18 0x03
+
+# CHECK:    idiv    r1, r2, r3
+0x48 0x22 0x18 0x00
+
+# CHECK:    idivu   r1, r2, r3
+0x48 0x22 0x18 0x02
+
+# CHECK:    mul    r1, r2, r3
+0x40 0x22 0x18 0x00
+
+# CHECK:    mulh   r1, r2, r3
+0x40 0x22 0x18 0x01
+
+# CHECK:    mulhu  r1, r2, r3
+0x40 0x22 0x18 0x03
+
+# CHECK:    mulhsu r1, r2, r3
+0x40 0x22 0x18 0x02
+
+# CHECK:    or      r1, r2, r3
+0x80 0x22 0x18 0x00
+
+# CHECK:    rsub    r1, r2, r3
+0x04 0x22 0x18 0x00
+
+# CHECK:    rsubc   r1, r2, r3
+0x0c 0x22 0x18 0x00
+
+# CHECK:    rsubk   r1, r2, r3
+0x14 0x22 0x18 0x00
+
+# CHECK:    rsubkc  r1, r2, r3
+0x1c 0x22 0x18 0x00
+
+# CHECK:    sext16  r1, r2
+0x90 0x22 0x00 0x61
+
+# CHECK:    sext8   r1, r2
+0x90 0x22 0x00 0x60
+
+# CHECK:    xor     r1, r2, r3
+0x88 0x22 0x18 0x00
+
+# CHECK:    or      r0, r0, r0
+0x80 0x00 0x00 0x00
+
+################################################################################
+# TYPE B instructions
+################################################################################
+
+# CHECK:    addi    r1, r2, 15
+0x20 0x22 0x00 0x0f
+
+# CHECK:    addic   r1, r2, 15
+0x28 0x22 0x00 0x0f
+
+# CHECK:    addik   r1, r2, 15
+0x30 0x22 0x00 0x0f
+
+# CHECK:    addikc  r1, r2, 15
+0x38 0x22 0x00 0x0f
+
+# CHECK:    andi    r1, r2, 15
+0xa4 0x22 0x00 0x0f
+
+# CHECK:    andni   r1, r2, 15
+0xac 0x22 0x00 0x0f
+
+# CHECK:    muli    r1, r2, 15
+0x60 0x22 0x00 0x0f
+
+# CHECK:    ori     r1, r2, 15
+0xa0 0x22 0x00 0x0f
+
+# CHECK:    rsubi   r1, r2, 15
+0x24 0x22 0x00 0x0f
+
+# CHECK:    rsubic  r1, r2, 15
+0x2c 0x22 0x00 0x0f
+
+# CHECK:    rsubik  r1, r2, 15
+0x34 0x22 0x00 0x0f
+
+# CHECK:    rsubikc r1, r2, 15
+0x3c 0x22 0x00 0x0f
+
+# CHECK:    rtbd r15, 15
+0xb6 0x4f 0x00 0x0f
+
+# CHECK:    rted r15, 15
+0xb6 0x8f 0x00 0x0f
+
+# CHECK:    rtid r15, 15
+0xb6 0x2f 0x00 0x0f
+
+# CHECK:    rtsd r15, 15
+0xb6 0x0f 0x00 0x0f
+
+# CHECK:    xori r1, r2, 15
+0xa8 0x22 0x00 0x0f
+
+################################################################################
+# FPU instructions
+################################################################################
+
+# CHECK:    fadd         r0, r1, r2
+0x58 0x01 0x10 0x00
+
+# CHECK:    frsub        r0, r1, r2
+0x58 0x01 0x10 0x80
+
+# CHECK:    fmul         r0, r1, r2
+0x58 0x01 0x11 0x00
+
+# CHECK:    fdiv         r0, r1, r2
+0x58 0x01 0x11 0x80
+
+# CHECK:    fsqrt        r0, r1
+0x58 0x01 0x03 0x80
+
+# CHECK:    fint         r0, r1
+0x58 0x01 0x03 0x00
+
+# CHECK:    flt          r0, r1
+0x58 0x01 0x02 0x80
+
+# CHECK:    fcmp.un     r0, r1, r2
+0x58 0x01 0x12 0x00
+
+# CHECK:    fcmp.lt     r0, r1, r2
+0x58 0x01 0x12 0x10
+
+# CHECK:    fcmp.eq     r0, r1, r2
+0x58 0x01 0x12 0x20
+
+# CHECK:    fcmp.le     r0, r1, r2
+0x58 0x01 0x12 0x30
+
+# CHECK:    fcmp.gt     r0, r1, r2
+0x58 0x01 0x12 0x40
+
+# CHECK:    fcmp.ne     r0, r1, r2
+0x58 0x01 0x12 0x50
+
+# CHECK:    fcmp.ge     r0, r1, r2
+0x58 0x01 0x12 0x60
+
+################################################################################
+# IMM instruction processing
+################################################################################
+
+# CHECK:    addi    r0, r0, 0
+0x20 0x00 0x00 0x00
+
+# CHECK:    addi    r0, r0, 1
+0x20 0x00 0x00 0x01
+
+# CHECK:    addi    r0, r0, 2
+0x20 0x00 0x00 0x02
+
+# CHECK:    addi    r0, r0, 4
+0x20 0x00 0x00 0x04
+
+# CHECK:    addi    r0, r0, 8
+0x20 0x00 0x00 0x08
+
+# CHECK:    addi    r0, r0, 16
+0x20 0x00 0x00 0x10
+
+# CHECK:    addi    r0, r0, 32
+0x20 0x00 0x00 0x20
+
+# CHECK:    addi    r0, r0, 64
+0x20 0x00 0x00 0x40
+
+# CHECK:    addi    r0, r0, 128
+0x20 0x00 0x00 0x80
+
+# CHECK:    addi    r0, r0, 256
+0x20 0x00 0x01 0x00
+
+# CHECK:    addi    r0, r0, 512
+0x20 0x00 0x02 0x00
+
+# CHECK:    addi    r0, r0, 1024
+0x20 0x00 0x04 0x00
+
+# CHECK:    addi    r0, r0, 2048
+0x20 0x00 0x08 0x00
+
+# CHECK:    addi    r0, r0, 4096
+0x20 0x00 0x10 0x00
+
+# CHECK:    addi    r0, r0, 8192
+0x20 0x00 0x20 0x00
+
+# CHECK:    addi    r0, r0, 16384
+0x20 0x00 0x40 0x00
+
+# CHECK:    imm     0
+# CHECK:    addi    r0, r0, -32768
+0xb0 0x00 0x00 0x00 0x20 0x00 0x80 0x00
+
+# CHECK:    imm     1
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x01 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     2
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x02 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     4
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x04 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     8
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x08 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     16
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x10 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     32
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x20 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     64
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x40 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     128
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x00 0x80 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     256
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x01 0x00 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     512
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x02 0x00 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     1024
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x04 0x00 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     2048
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x08 0x00 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     4096
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x10 0x00 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     8192
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x20 0x00 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     16384
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x40 0x00 0x20 0x00 0x00 0x00
+
+# CHECK:    imm     -32768
+# CHECK:    addi    r0, r0, 0
+0xb0 0x00 0x80 0x00 0x20 0x00 0x00 0x00
+
+################################################################################
+# Memory instructions
+################################################################################
+
+# CHECK:    lbu     r1, r2, r3
+0xc0 0x22 0x18 0x00
+
+# CHECK:    lbur    r1, r2, r3
+0xc0 0x22 0x1a 0x00
+
+# CHECK:    lbui    r1, r2, 28
+0xe0 0x22 0x00 0x1c
+
+# CHECK:    lhu     r1, r2, r3
+0xc4 0x22 0x18 0x00
+
+# CHECK:    lhur    r1, r2, r3
+0xc4 0x22 0x1a 0x00
+
+# CHECK:    lhui    r1, r2, 28
+0xe4 0x22 0x00 0x1c
+
+# CHECK:    lw      r1, r2, r3
+0xc8 0x22 0x18 0x00
+
+# CHECK:    lwr    r1, r2, r3
+0xc8 0x22 0x1a 0x00
+
+# CHECK:    lwi     r1, r2, 28
+0xe8 0x22 0x00 0x1c
+
+# CHECK:    lwx      r1, r2, r3
+0xc8 0x22 0x1c 0x00
+
+# CHECK:    sb      r1, r2, r3
+0xd0 0x22 0x18 0x00
+
+# CHECK:    sbr     r1, r2, r3
+0xd0 0x22 0x1a 0x00
+
+# CHECK:    sbi     r1, r2, 28
+0xf0 0x22 0x00 0x1c
+
+# CHECK:    sh      r1, r2, r3
+0xd4 0x22 0x18 0x00
+
+# CHECK:    shr     r1, r2, r3
+0xd4 0x22 0x1a 0x00
+
+# CHECK:    shi     r1, r2, 28
+0xf4 0x22 0x00 0x1c
+
+# CHECK:    sw      r1, r2, r3
+0xd8 0x22 0x18 0x00
+
+# CHECK:    swr    r1, r2, r3
+0xd8 0x22 0x1a 0x00
+
+# CHECK:    swi     r1, r2, 28
+0xf8 0x22 0x00 0x1c
+
+# CHECK:    swx      r1, r2, r3
+0xd8 0x22 0x1c 0x00
+
+################################################################################
+# Special instructions
+################################################################################
+
+# CHECK:    mfs         r0, 0
+0x94 0x00 0x80 0x00
+
+# CHECK:    msrclr      r0, 0
+0x94 0x11 0x00 0x00
+
+# CHECK:    msrset      r0, 0
+0x94 0x10 0x00 0x00
+
+# CHECK:    mts         0, r0
+0x94 0x00 0xc0 0x00
+
+# CHECK:    wdc         r0, r1
+0x90 0x00 0x08 0x64
+
+# CHECK:    wdc.clear   r0, r1
+0x90 0x00 0x08 0x66
+
+# CHECK:    wdc.flush   r0, r1
+0x90 0x00 0x08 0x74
+
+# CHECK:    wic         r0, r1
+0x90 0x00 0x08 0x68
+
+################################################################################
+# Shift instructions
+################################################################################
+
+# CHECK:    bsrl    r1, r2, r3
+0x44 0x22 0x18 0x00
+
+# CHECK:    bsra    r1, r2, r3
+0x44 0x22 0x1a 0x00
+
+# CHECK:    bsll    r1, r2, r3
+0x44 0x22 0x1c 0x00
+
+# CHECK:    bsrli   r1, r2, 0
+0x64 0x22 0x00 0x00
+
+# CHECK:    bsrai   r1, r2, 0
+0x64 0x22 0x02 0x00
+
+# CHECK:    bslli   r1, r2, 0
+0x64 0x22 0x04 0x00
+
+# CHECK:    sra     r1, r2
+0x90 0x22 0x00 0x01
+
+# CHECK:    srl     r1, r2
+0x90 0x22 0x00 0x41
+
+################################################################################
+# Pattern instructions
+################################################################################
+
+# CHECK:    pcmpbf      r0, r1, r2
+0x80 0x01 0x14 0x00
+
+# CHECK:    pcmpne      r0, r1, r2
+0x8c 0x01 0x14 0x00
+
+# CHECK:    pcmpeq      r0, r1, r2
+0x88 0x01 0x14 0x00
+
+################################################################################
+# Opcode disassembly
+################################################################################
+
+# CHECK:    add     r0, r0, r0
+0x00 0x00 0x00 0x00
+
+# CHECK:    add     r1, r1, r1
+0x00 0x21 0x08 0x00
+
+# CHECK:    add     r2, r2, r2
+0x00 0x42 0x10 0x00
+
+# CHECK:    add     r3, r3, r3
+0x00 0x63 0x18 0x00
+
+# CHECK:    add     r4, r4, r4
+0x00 0x84 0x20 0x00
+
+# CHECK:    add     r5, r5, r5
+0x00 0xa5 0x28 0x00
+
+# CHECK:    add     r6, r6, r6
+0x00 0xc6 0x30 0x00
+
+# CHECK:    add     r7, r7, r7
+0x00 0xe7 0x38 0x00
+
+# CHECK:    add     r8, r8, r8
+0x01 0x08 0x40 0x00
+
+# CHECK:    add     r9, r9, r9
+0x01 0x29 0x48 0x00
+
+# CHECK:    add     r10, r10, r10
+0x01 0x4a 0x50 0x00
+
+# CHECK:    add     r11, r11, r11
+0x01 0x6b 0x58 0x00
+
+# CHECK:    add     r12, r12, r12
+0x01 0x8c 0x60 0x00
+
+# CHECK:    add     r13, r13, r13
+0x01 0xad 0x68 0x00
+
+# CHECK:    add     r14, r14, r14
+0x01 0xce 0x70 0x00
+
+# CHECK:    add     r15, r15, r15
+0x01 0xef 0x78 0x00
+
+# CHECK:    add     r16, r16, r16
+0x02 0x10 0x80 0x00
+
+# CHECK:    add     r17, r17, r17
+0x02 0x31 0x88 0x00
+
+# CHECK:    add     r18, r18, r18
+0x02 0x52 0x90 0x00
+
+# CHECK:    add     r19, r19, r19
+0x02 0x73 0x98 0x00
+
+# CHECK:    add     r20, r20, r20
+0x02 0x94 0xa0 0x00
+
+# CHECK:    add     r21, r21, r21
+0x02 0xb5 0xa8 0x00
+
+# CHECK:    add     r22, r22, r22
+0x02 0xd6 0xb0 0x00
+
+# CHECK:    add     r23, r23, r23
+0x02 0xf7 0xb8 0x00
+
+# CHECK:    add     r24, r24, r24
+0x03 0x18 0xc0 0x00
+
+# CHECK:    add     r25, r25, r25
+0x03 0x39 0xc8 0x00
+
+# CHECK:    add     r26, r26, r26
+0x03 0x5a 0xd0 0x00
+
+# CHECK:    add     r27, r27, r27
+0x03 0x7b 0xd8 0x00
+
+# CHECK:    add     r28, r28, r28
+0x03 0x9c 0xe0 0x00
+
+# CHECK:    add     r29, r29, r29
+0x03 0xbd 0xe8 0x00
+
+# CHECK:    add     r30, r30, r30
+0x03 0xde 0xf0 0x00
+
+# CHECK:    add     r31, r31, r31
+0x03 0xff 0xf8 0x00
+
+# CHECK:    addi    r0, r0, 0
+0x20 0x00 0x00 0x00
+
+# CHECK:    addi    r0, r0, 1
+0x20 0x00 0x00 0x01
+
+# CHECK:    addi    r0, r0, 2
+0x20 0x00 0x00 0x02
+
+# CHECK:    addi    r0, r0, 4
+0x20 0x00 0x00 0x04
+
+# CHECK:    addi    r0, r0, 8
+0x20 0x00 0x00 0x08
+
+# CHECK:    addi    r0, r0, 16
+0x20 0x00 0x00 0x10
+
+# CHECK:    addi    r0, r0, 32
+0x20 0x00 0x00 0x20
+
+# CHECK:    addi    r0, r0, 64
+0x20 0x00 0x00 0x40
+
+# CHECK:    addi    r0, r0, 128
+0x20 0x00 0x00 0x80
+
+# CHECK:    addi    r0, r0, 256
+0x20 0x00 0x01 0x00
+
+# CHECK:    addi    r0, r0, 512
+0x20 0x00 0x02 0x00
+
+# CHECK:    addi    r0, r0, 1024
+0x20 0x00 0x04 0x00
+
+# CHECK:    addi    r0, r0, 2048
+0x20 0x00 0x08 0x00
+
+# CHECK:    addi    r0, r0, 4096
+0x20 0x00 0x10 0x00
+
+# CHECK:    addi    r0, r0, 8192
+0x20 0x00 0x20 0x00
+
+# CHECK:    addi    r0, r0, 16384
+0x20 0x00 0x40 0x00
+
+# CHECK:    addi    r0, r0, -1
+0x20 0x00 0xff 0xff
+
+# CHECK:    addi    r0, r0, -2
+0x20 0x00 0xff 0xfe
+
+# CHECK:    addi    r0, r0, -4
+0x20 0x00 0xff 0xfc
+
+# CHECK:    addi    r0, r0, -8
+0x20 0x00 0xff 0xf8
+
+# CHECK:    addi    r0, r0, -16
+0x20 0x00 0xff 0xf0
+
+# CHECK:    addi    r0, r0, -32
+0x20 0x00 0xff 0xe0
+
+# CHECK:    addi    r0, r0, -64
+0x20 0x00 0xff 0xc0
+
+# CHECK:    addi    r0, r0, -128
+0x20 0x00 0xff 0x80
+
+# CHECK:    addi    r0, r0, -256
+0x20 0x00 0xff 0x00
+
+# CHECK:    addi    r0, r0, -512
+0x20 0x00 0xfe 0x00
+
+# CHECK:    addi    r0, r0, -1024
+0x20 0x00 0xfc 0x00
+
+# CHECK:    addi    r0, r0, -2048
+0x20 0x00 0xf8 0x00
+
+# CHECK:    addi    r0, r0, -4096
+0x20 0x00 0xf0 0x00
+
+# CHECK:    addi    r0, r0, -8192
+0x20 0x00 0xe0 0x00
+
+# CHECK:    addi    r0, r0, -16384
+0x20 0x00 0xc0 0x00
+
+# CHECK:    addi    r0, r0, -32768
+0x20 0x00 0x80 0x00
+
+################################################################################
+# FSL instructions
+################################################################################
+
+# CHECK:    get         r0, rfsl0
+0x6c 0x00 0x00 0x00
+
+# CHECK:    nget        r0, rfsl0
+0x6c 0x00 0x40 0x00
+
+# CHECK:    cget        r0, rfsl0
+0x6c 0x00 0x20 0x00
+
+# CHECK:    ncget       r0, rfsl0
+0x6c 0x00 0x60 0x00
+
+# CHECK:    tget        r0, rfsl0
+0x6c 0x00 0x10 0x00
+
+# CHECK:    tnget       r0, rfsl0
+0x6c 0x00 0x50 0x00
+
+# CHECK:    tcget       r0, rfsl0
+0x6c 0x00 0x30 0x00
+
+# CHECK:    tncget      r0, rfsl0
+0x6c 0x00 0x70 0x00
+
+# CHECK:    aget        r0, rfsl0
+0x6c 0x00 0x08 0x00
+
+# CHECK:    naget       r0, rfsl0
+0x6c 0x00 0x48 0x00
+
+# CHECK:    caget       r0, rfsl0
+0x6c 0x00 0x28 0x00
+
+# CHECK:    ncaget      r0, rfsl0
+0x6c 0x00 0x68 0x00
+
+# CHECK:    taget       r0, rfsl0
+0x6c 0x00 0x18 0x00
+
+# CHECK:    tnaget      r0, rfsl0
+0x6c 0x00 0x58 0x00
+
+# CHECK:    tcaget      r0, rfsl0
+0x6c 0x00 0x38 0x00
+
+# CHECK:    tncaget     r0, rfsl0
+0x6c 0x00 0x78 0x00
+
+# CHECK:    eget        r0, rfsl0
+0x6c 0x00 0x04 0x00
+
+# CHECK:    neget       r0, rfsl0
+0x6c 0x00 0x44 0x00
+
+# CHECK:    ecget       r0, rfsl0
+0x6c 0x00 0x24 0x00
+
+# CHECK:    necget      r0, rfsl0
+0x6c 0x00 0x64 0x00
+
+# CHECK:    teget       r0, rfsl0
+0x6c 0x00 0x14 0x00
+
+# CHECK:    tneget      r0, rfsl0
+0x6c 0x00 0x54 0x00
+
+# CHECK:    tecget      r0, rfsl0
+0x6c 0x00 0x34 0x00
+
+# CHECK:    tnecget     r0, rfsl0
+0x6c 0x00 0x74 0x00
+
+# CHECK:    eaget       r0, rfsl0
+0x6c 0x00 0x0c 0x00
+
+# CHECK:    neaget      r0, rfsl0
+0x6c 0x00 0x4c 0x00
+
+# CHECK:    ecaget      r0, rfsl0
+0x6c 0x00 0x2c 0x00
+
+# CHECK:    necaget     r0, rfsl0
+0x6c 0x00 0x6c 0x00
+
+# CHECK:    teaget      r0, rfsl0
+0x6c 0x00 0x1c 0x00
+
+# CHECK:    tneaget     r0, rfsl0
+0x6c 0x00 0x5c 0x00
+
+# CHECK:    tecaget     r0, rfsl0
+0x6c 0x00 0x3c 0x00
+
+# CHECK:    tnecaget    r0, rfsl0
+0x6c 0x00 0x7c 0x00
+
+# CHECK:    getd        r0, r1
+0x4c 0x00 0x08 0x00
+
+# CHECK:    ngetd       r0, r1
+0x4c 0x00 0x0a 0x00
+
+# CHECK:    cgetd       r0, r1
+0x4c 0x00 0x09 0x00
+
+# CHECK:    ncgetd      r0, r1
+0x4c 0x00 0x0b 0x00
+
+# CHECK:    tgetd       r0, r1
+0x4c 0x00 0x08 0x80
+
+# CHECK:    tngetd      r0, r1
+0x4c 0x00 0x0a 0x80
+
+# CHECK:    tcgetd      r0, r1
+0x4c 0x00 0x09 0x80
+
+# CHECK:    tncgetd     r0, r1
+0x4c 0x00 0x0b 0x80
+
+# CHECK:    agetd       r0, r1
+0x4c 0x00 0x08 0x40
+
+# CHECK:    nagetd      r0, r1
+0x4c 0x00 0x0a 0x40
+
+# CHECK:    cagetd     r0, r1
+0x4c 0x00 0x09 0x40
+
+# CHECK:    ncagetd     r0, r1
+0x4c 0x00 0x0b 0x40
+
+# CHECK:    tagetd      r0, r1
+0x4c 0x00 0x08 0xc0
+
+# CHECK:    tnagetd     r0, r1
+0x4c 0x00 0x0a 0xc0
+
+# CHECK:    tcagetd     r0, r1
+0x4c 0x00 0x09 0xc0
+
+# CHECK:    tncagetd    r0, r1
+0x4c 0x00 0x0b 0xc0
+
+# CHECK:    egetd       r0, r1
+0x4c 0x00 0x08 0x20
+
+# CHECK:    negetd      r0, r1
+0x4c 0x00 0x0a 0x20
+
+# CHECK:    ecgetd      r0, r1
+0x4c 0x00 0x09 0x20
+
+# CHECK:    necgetd     r0, r1
+0x4c 0x00 0x0b 0x20
+
+# CHECK:    tegetd      r0, r1
+0x4c 0x00 0x08 0xa0
+
+# CHECK:    tnegetd     r0, r1
+0x4c 0x00 0x0a 0xa0
+
+# CHECK:    tecgetd     r0, r1
+0x4c 0x00 0x09 0xa0
+
+# CHECK:    tnecgetd    r0, r1
+0x4c 0x00 0x0b 0xa0
+
+# CHECK:    eagetd      r0, r1
+0x4c 0x00 0x08 0x60
+
+# CHECK:    neagetd     r0, r1
+0x4c 0x00 0x0a 0x60
+
+# CHECK:    ecagetd     r0, r1
+0x4c 0x00 0x09 0x60
+
+# CHECK:    necagetd    r0, r1
+0x4c 0x00 0x0b 0x60
+
+# CHECK:    teagetd     r0, r1
+0x4c 0x00 0x08 0xe0
+
+# CHECK:    tneagetd    r0, r1
+0x4c 0x00 0x0a 0xe0
+
+# CHECK:    tecagetd    r0, r1
+0x4c 0x00 0x09 0xe0
+
+# CHECK:    tnecagetd   r0, r1
+0x4c 0x00 0x0b 0xe0
+
+# CHECK:    put         r0, rfsl0
+0x6c 0x00 0x80 0x00
+
+# CHECK:    aput        r0, rfsl0
+0x6c 0x00 0x88 0x00
+
+# CHECK:    cput        r0, rfsl0
+0x6c 0x00 0xa0 0x00
+
+# CHECK:    caput       r0, rfsl0
+0x6c 0x00 0xa8 0x00
+
+# CHECK:    nput        r0, rfsl0
+0x6c 0x00 0xc0 0x00
+
+# CHECK:    naput       r0, rfsl0
+0x6c 0x00 0xc8 0x00
+
+# CHECK:    ncput       r0, rfsl0
+0x6c 0x00 0xe0 0x00
+
+# CHECK:    ncaput      r0, rfsl0
+0x6c 0x00 0xe8 0x00
+
+# CHECK:    tput        rfsl0
+0x6c 0x00 0x90 0x00
+
+# CHECK:    taput       rfsl0
+0x6c 0x00 0x98 0x00
+
+# CHECK:    tcput       rfsl0
+0x6c 0x00 0xb0 0x00
+
+# CHECK:    tcaput      rfsl0
+0x6c 0x00 0xb8 0x00
+
+# CHECK:    tnput       rfsl0
+0x6c 0x00 0xd0 0x00
+
+# CHECK:    tnaput      rfsl0
+0x6c 0x00 0xd8 0x00
+
+# CHECK:    tncput      rfsl0
+0x6c 0x00 0xf0 0x00
+
+# CHECK:    tncaput     rfsl0
+0x6c 0x00 0xf8 0x00
+
+# CHECK:    putd        r0, r1
+0x4c 0x00 0x0c 0x00
+
+# CHECK:    aputd       r0, r1
+0x4c 0x00 0x0c 0x40
+
+# CHECK:    cputd       r0, r1
+0x4c 0x00 0x0d 0x00
+
+# CHECK:    caputd      r0, r1
+0x4c 0x00 0x0d 0x40
+
+# CHECK:    nputd       r0, r1
+0x4c 0x00 0x0e 0x00
+
+# CHECK:    naputd      r0, r1
+0x4c 0x00 0x0e 0x40
+
+# CHECK:    ncputd      r0, r1
+0x4c 0x00 0x0f 0x00
+
+# CHECK:    ncaputd     r0, r1
+0x4c 0x00 0x0f 0x40
+
+# CHECK:    tputd       r1
+0x4c 0x00 0x0c 0x80
+
+# CHECK:    taputd      r1
+0x4c 0x00 0x0c 0xc0
+
+# CHECK:    tcputd      r1
+0x4c 0x00 0x0d 0x80
+
+# CHECK:    tcaputd     r1
+0x4c 0x00 0x0d 0xc0
+
+# CHECK:    tnputd      r1
+0x4c 0x00 0x0e 0x80
+
+# CHECK:    tnaputd     r1
+0x4c 0x00 0x0e 0xc0
+
+# CHECK:    tncputd     r1
+0x4c 0x00 0x0f 0x80
+
+# CHECK:    tncaputd    r1
+0x4c 0x00 0x0f 0xc0
+
+# CHECK:    get     r0, rfsl1
+0x6c 0x00 0x00 0x01
+
+# CHECK:    get     r0, rfsl2
+0x6c 0x00 0x00 0x02
+
+# CHECK:    get     r0, rfsl3
+0x6c 0x00 0x00 0x03
+
+# CHECK:    get     r0, rfsl4
+0x6c 0x00 0x00 0x04
+
+# CHECK:    get     r0, rfsl5
+0x6c 0x00 0x00 0x05
+
+# CHECK:    get     r0, rfsl6
+0x6c 0x00 0x00 0x06
+
+# CHECK:    get     r0, rfsl7
+0x6c 0x00 0x00 0x07
+
+# CHECK:    get     r0, rfsl8
+0x6c 0x00 0x00 0x08
+
+# CHECK:    get     r0, rfsl9
+0x6c 0x00 0x00 0x09
+
+# CHECK:    get     r0, rfsl10
+0x6c 0x00 0x00 0x0a
+
+# CHECK:    get     r0, rfsl11
+0x6c 0x00 0x00 0x0b
+
+# CHECK:    get     r0, rfsl12
+0x6c 0x00 0x00 0x0c
+
+# CHECK:    get     r0, rfsl13
+0x6c 0x00 0x00 0x0d
+
+# CHECK:    get     r0, rfsl14
+0x6c 0x00 0x00 0x0e
+
+# CHECK:    get     r0, rfsl15
+0x6c 0x00 0x00 0x0f
diff --git a/test/MC/Disassembler/X86/dg.exp b/test/MC/Disassembler/X86/dg.exp
new file mode 100644
index 00000000000..a4d0e7c718c
--- /dev/null
+++ b/test/MC/Disassembler/X86/dg.exp
@@ -0,0 +1,6 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target X86] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]]
+}
+
diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt
new file mode 100644
index 00000000000..13a19d2ca4c
--- /dev/null
+++ b/test/MC/Disassembler/X86/simple-tests.txt
@@ -0,0 +1,68 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
+
+# CHECK: int	$33
+0xCD 0x21 
+
+# CHECK: int	$33
+0xCD 0x21
+
+
+# CHECK: addb	%al, (%rax)
+0 0
+
+# CHECK: callq	-1234
+0xe8 0x2e 0xfb 0xff 0xff
+
+# CHECK: lfence
+0x0f 0xae 0xe8
+
+# CHECK: mfence
+0x0f 0xae 0xf0
+
+# CHECK: monitor
+0x0f 0x01 0xc8
+
+# CHECK: mwait
+0x0f 0x01 0xc9
+
+# CHECK: vmcall
+0x0f 0x01 0xc1
+
+# CHECK: vmlaunch
+0x0f 0x01 0xc2
+
+# CHECK: vmresume
+0x0f 0x01 0xc3
+
+# CHECK: vmxoff
+0x0f 0x01 0xc4
+
+# CHECK: swapgs
+0x0f 0x01 0xf8
+
+# CHECK: rdtscp
+0x0f 0x01 0xf9
+
+# CHECK: vmxon
+0xf3 0x0f 0xc7 0x30
+
+# CHECK: vmptrld
+0x0f 0xc7 0x30
+
+# CHECK: vmptrst
+0x0f 0xc7 0x38
+
+# CHECK: movl $0, -4(%rbp)
+0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
+
+# CHECK: movq	%cr0, %rcx
+0x0f 0x20 0xc1
+
+# CHECK: leal	4(%rsp), %ecx
+0x8d 0x4c 0x24 0x04 
+
+# CHECK: enter	$1, $2
+0xc8 0x01 0x00 0x02
+
+# CHECK: movw	$47416, -66(%rbp)
+0x66 0xc7 0x45 0xbe 0x38 0xb9
diff --git a/test/MC/Disassembler/arm-tests.txt b/test/MC/Disassembler/arm-tests.txt
deleted file mode 100644
index 31e4f136e1c..00000000000
--- a/test/MC/Disassembler/arm-tests.txt
+++ /dev/null
@@ -1,117 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
-
-# CHECK:	b	#0
-0xfe 0xff 0xff 0xea
-
-# CHECK:	bfc	r8, #0, #16
-0x1f 0x80 0xcf 0xe7
-
-# CHECK:	bfi	r8, r0, #16, #1
-0x10 0x88 0xd0 0xe7
-
-# CHECK:	cmn	r0, #1
-0x01 0x00 0x70 0xe3
-
-# CHECK:	dmb
-0x5f 0xf0 0x7f 0xf5
-
-# CHECK:	dmb	nshst
-0x56 0xf0 0x7f 0xf5
-
-# CHECK:	dsb
-0x4f 0xf0 0x7f 0xf5
-
-# CHECK:	dsb	st
-0x4e 0xf0 0x7f 0xf5
-
-# CHECK:	isb
-0x6f 0xf0 0x7f 0xf5
-
-# CHECK:	ldclvc	p5, cr15, [r8], #-0
-0x00 0xf5 0x78 0x7c
-
-# CHECK:	ldr	r0, [r2], #15
-0x0f 0x00 0x92 0xe4
-
-# CHECK:	ldrh	r0, [r2], #0
-0xb0 0x00 0xd2 0xe0
-
-# CHECK:	ldrht	r0, [r2], #15
-0xbf 0x00 0xf2 0xe0
-
-# CHECK:	ldrsbtvs	lr, [r2], -r9
-0xd9 0xe9 0x32 0x60
-
-# CHECK:	lsls	r0, r2, #31
-0x82 0x0f 0xb0 0xe1
-
-# CHECK:	mcr2	p0, #0, r2, cr1, cr0, #7
-0xf0 0x20 0x01 0xfe
-
-# CHECK:	movt	r8, #65535
-0xff 0x8f 0x4f 0xe3
-
-# CHECK:	mvnspl	r7, #245, 2
-0xf5 0x71 0xf0 0x53
-
-# CHECK-NOT:	orr	r7, r8, r7, rrx #0
-# CHECK:	orr	r7, r8, r7, rrx
-0x67 0x70 0x88 0xe1
-
-# CHECK:	pkhbt	r8, r9, r10, lsl #4
-0x1a 0x82 0x89 0xe6
-
-# CHECK-NOT:	pkhbtls	pc, r11, r11, lsl #0
-# CHECK:	pkhbtls	pc, r11, r11
-0x1b 0xf0 0x8b 0x96
-
-# CHECK:	pop	{r0, r2, r4, r6, r8, r10}
-0x55 0x05 0xbd 0xe8
-
-# CHECK:	push	{r0, r2, r4, r6, r8, r10}
-0x55 0x05 0x2d 0xe9
-
-# CHECK:	qsax	r8, r9, r10
-0x5a 0x8f 0x29 0xe6
-
-# CHECK:	rfedb	r0!
-0x00 0x0a 0x30 0xf9
-
-# CHECK-NOT:	rsbeq	r0, r2, r0, lsl #0
-# CHECK:	rsbeq	r0, r2, r0
-0x00 0x00 0x62 0x00
-
-# CHECK-NOT:	rscseq	r0, r0, r1, lsl #0
-# CHECK:	rscseq	r0, r0, r1
-0x01 0x00 0xf0 0x00
-
-# CHECK:	sbcs	r0, pc, #1
-0x01 0x00 0xdf 0xe2
-
-# CHECK:	sbfx	r0, r1, #0, #8
-0x51 0x00 0xa7 0xe7
-
-# CHECK:	ssat	r8, #1, r10, lsl #8
-0x1a 0x84 0xa0 0xe6
-
-# CHECK-NOT:	ssatmi	r0, #17, r12, lsl #0
-# CHECK:	ssatmi	r0, #17, r12
-0x1c 0x00 0xb0 0x46
-
-# CHECK:	stmdb	r10!, {r4, r5, r6, r7, lr}
-0xf0 0x40 0x2a 0xe9
-
-# CHECK:	teq	r0, #31
-0x1f 0x00 0x30 0xe3
-
-# CHECK:	ubfx	r0, r0, #16, #1
-0x50 0x08 0xe0 0xe7
-
-# CHECK:	usat	r8, #0, r10, asr #32
-0x5a 0x80 0xe0 0xe6
-
-# CHECK:        setend be
-0x00 0x02 0x01 0xf1
-
-# CHECK:        setend le
-0x00 0x00 0x01 0xf1
diff --git a/test/MC/Disassembler/dg.exp b/test/MC/Disassembler/dg.exp
deleted file mode 100644
index fc2f17a6fba..00000000000
--- a/test/MC/Disassembler/dg.exp
+++ /dev/null
@@ -1,6 +0,0 @@
-load_lib llvm.exp
-
-if { [llvm_supports_target ARM] } {
-  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]]
-}
-
diff --git a/test/MC/Disassembler/mblaze-tests.txt b/test/MC/Disassembler/mblaze-tests.txt
deleted file mode 100644
index 224473f29c7..00000000000
--- a/test/MC/Disassembler/mblaze-tests.txt
+++ /dev/null
@@ -1,1079 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s
-
-################################################################################
-# Branch instructions
-################################################################################
-
-# CHECK:    beq     r2, r3
-0x9c 0x02 0x18 0x00
-
-# CHECK:    bge     r2, r3
-0x9c 0xa2 0x18 0x00
-
-# CHECK:    bgt     r2, r3
-0x9c 0x82 0x18 0x00
-
-# CHECK:    ble     r2, r3
-0x9c 0x62 0x18 0x00
-
-# CHECK:    blt     r2, r3
-0x9c 0x42 0x18 0x00
-
-# CHECK:    bne     r2, r3
-0x9c 0x22 0x18 0x00
-
-# CHECK:    beqd    r2, r3
-0x9e 0x02 0x18 0x00
-
-# CHECK:    bged    r2, r3
-0x9e 0xa2 0x18 0x00
-
-# CHECK:    bgtd    r2, r3
-0x9e 0x82 0x18 0x00
-
-# CHECK:    bled    r2, r3
-0x9e 0x62 0x18 0x00
-
-# CHECK:    bltd    r2, r3
-0x9e 0x42 0x18 0x00
-
-# CHECK:    bned    r2, r3
-0x9e 0x22 0x18 0x00
-
-# CHECK:    br      r3
-0x98 0x00 0x18 0x00
-
-# CHECK:    bra     r3
-0x98 0x08 0x18 0x00
-
-# CHECK:    brd     r3
-0x98 0x10 0x18 0x00
-
-# CHECK:    brad    r3
-0x98 0x18 0x18 0x00
-
-# CHECK:    brld    r15, r3
-0x99 0xf4 0x18 0x00
-
-# CHECK:    brald   r15, r3
-0x99 0xfc 0x18 0x00
-
-# CHECK:    brk     r15, r3
-0x99 0xec 0x18 0x00
-
-# CHECK:    beqi    r2, 0
-0xbc 0x02 0x00 0x00
-
-# CHECK:    bgei    r2, 0
-0xbc 0xa2 0x00 0x00
-
-# CHECK:    bgti    r2, 0
-0xbc 0x82 0x00 0x00
-
- # CHECK:   blei    r2, 0
-0xbc 0x62 0x00 0x00
-
-# CHECK:    blti    r2, 0
-0xbc 0x42 0x00 0x00
-
-# CHECK:    bnei    r2, 0
-0xbc 0x22 0x00 0x00
-
-# CHECK:    beqid   r2, 0
-0xbe 0x02 0x00 0x00
-
-# CHECK:    bgeid   r2, 0
-0xbe 0xa2 0x00 0x00
-
-# CHECK:    bgtid   r2, 0
-0xbe 0x82 0x00 0x00
-
-# CHECK:    bleid   r2, 0
-0xbe 0x62 0x00 0x00
-
-# CHECK:    bltid   r2, 0
-0xbe 0x42 0x00 0x00
-
-# CHECK:    bneid   r2, 0
-0xbe 0x22 0x00 0x00
-
-# CHECK:    bri     0
-0xb8 0x00 0x00 0x00
-
-# CHECK:    brai    0
-0xb8 0x08 0x00 0x00
-
-# CHECK:    brid    0
-0xb8 0x10 0x00 0x00
-
-# CHECK:    braid   0
-0xb8 0x18 0x00 0x00
-
-# CHECK:    brlid   r15, 0
-0xb9 0xf4 0x00 0x00
-
-# CHECK:    bralid  r15, 0
-0xb9 0xfc 0x00 0x00
-
-# CHECK:    brki    r15, 0
-0xb9 0xec 0x00 0x00
-
-################################################################################
-# TYPE A instructions
-################################################################################
-
-# CHECK:    add     r1, r2, r3
-0x00 0x22 0x18 0x00
-
-# CHECK:    addc    r1, r2, r3
-0x08 0x22 0x18 0x00
-
-# CHECK:    addk    r1, r2, r3
-0x10 0x22 0x18 0x00
-
-# CHECK:    addkc   r1, r2, r3
-0x18 0x22 0x18 0x00
-
-# CHECK:    and     r1, r2, r3
-0x84 0x22 0x18 0x00
-
-# CHECK:    andn    r1, r2, r3
-0x8c 0x22 0x18 0x00
-
-# CHECK:    cmp     r1, r2, r3
-0x14 0x22 0x18 0x01
-
-# CHECK:    cmpu    r1, r2, r3
-0x14 0x22 0x18 0x03
-
-# CHECK:    idiv    r1, r2, r3
-0x48 0x22 0x18 0x00
-
-# CHECK:    idivu   r1, r2, r3
-0x48 0x22 0x18 0x02
-
-# CHECK:    mul    r1, r2, r3
-0x40 0x22 0x18 0x00
-
-# CHECK:    mulh   r1, r2, r3
-0x40 0x22 0x18 0x01
-
-# CHECK:    mulhu  r1, r2, r3
-0x40 0x22 0x18 0x03
-
-# CHECK:    mulhsu r1, r2, r3
-0x40 0x22 0x18 0x02
-
-# CHECK:    or      r1, r2, r3
-0x80 0x22 0x18 0x00
-
-# CHECK:    rsub    r1, r2, r3
-0x04 0x22 0x18 0x00
-
-# CHECK:    rsubc   r1, r2, r3
-0x0c 0x22 0x18 0x00
-
-# CHECK:    rsubk   r1, r2, r3
-0x14 0x22 0x18 0x00
-
-# CHECK:    rsubkc  r1, r2, r3
-0x1c 0x22 0x18 0x00
-
-# CHECK:    sext16  r1, r2
-0x90 0x22 0x00 0x61
-
-# CHECK:    sext8   r1, r2
-0x90 0x22 0x00 0x60
-
-# CHECK:    xor     r1, r2, r3
-0x88 0x22 0x18 0x00
-
-# CHECK:    or      r0, r0, r0
-0x80 0x00 0x00 0x00
-
-################################################################################
-# TYPE B instructions
-################################################################################
-
-# CHECK:    addi    r1, r2, 15
-0x20 0x22 0x00 0x0f
-
-# CHECK:    addic   r1, r2, 15
-0x28 0x22 0x00 0x0f
-
-# CHECK:    addik   r1, r2, 15
-0x30 0x22 0x00 0x0f
-
-# CHECK:    addikc  r1, r2, 15
-0x38 0x22 0x00 0x0f
-
-# CHECK:    andi    r1, r2, 15
-0xa4 0x22 0x00 0x0f
-
-# CHECK:    andni   r1, r2, 15
-0xac 0x22 0x00 0x0f
-
-# CHECK:    muli    r1, r2, 15
-0x60 0x22 0x00 0x0f
-
-# CHECK:    ori     r1, r2, 15
-0xa0 0x22 0x00 0x0f
-
-# CHECK:    rsubi   r1, r2, 15
-0x24 0x22 0x00 0x0f
-
-# CHECK:    rsubic  r1, r2, 15
-0x2c 0x22 0x00 0x0f
-
-# CHECK:    rsubik  r1, r2, 15
-0x34 0x22 0x00 0x0f
-
-# CHECK:    rsubikc r1, r2, 15
-0x3c 0x22 0x00 0x0f
-
-# CHECK:    rtbd r15, 15
-0xb6 0x4f 0x00 0x0f
-
-# CHECK:    rted r15, 15
-0xb6 0x8f 0x00 0x0f
-
-# CHECK:    rtid r15, 15
-0xb6 0x2f 0x00 0x0f
-
-# CHECK:    rtsd r15, 15
-0xb6 0x0f 0x00 0x0f
-
-# CHECK:    xori r1, r2, 15
-0xa8 0x22 0x00 0x0f
-
-################################################################################
-# FPU instructions
-################################################################################
-
-# CHECK:    fadd         r0, r1, r2
-0x58 0x01 0x10 0x00
-
-# CHECK:    frsub        r0, r1, r2
-0x58 0x01 0x10 0x80
-
-# CHECK:    fmul         r0, r1, r2
-0x58 0x01 0x11 0x00
-
-# CHECK:    fdiv         r0, r1, r2
-0x58 0x01 0x11 0x80
-
-# CHECK:    fsqrt        r0, r1
-0x58 0x01 0x03 0x80
-
-# CHECK:    fint         r0, r1
-0x58 0x01 0x03 0x00
-
-# CHECK:    flt          r0, r1
-0x58 0x01 0x02 0x80
-
-# CHECK:    fcmp.un     r0, r1, r2
-0x58 0x01 0x12 0x00
-
-# CHECK:    fcmp.lt     r0, r1, r2
-0x58 0x01 0x12 0x10
-
-# CHECK:    fcmp.eq     r0, r1, r2
-0x58 0x01 0x12 0x20
-
-# CHECK:    fcmp.le     r0, r1, r2
-0x58 0x01 0x12 0x30
-
-# CHECK:    fcmp.gt     r0, r1, r2
-0x58 0x01 0x12 0x40
-
-# CHECK:    fcmp.ne     r0, r1, r2
-0x58 0x01 0x12 0x50
-
-# CHECK:    fcmp.ge     r0, r1, r2
-0x58 0x01 0x12 0x60
-
-################################################################################
-# IMM instruction processing
-################################################################################
-
-# CHECK:    addi    r0, r0, 0
-0x20 0x00 0x00 0x00
-
-# CHECK:    addi    r0, r0, 1
-0x20 0x00 0x00 0x01
-
-# CHECK:    addi    r0, r0, 2
-0x20 0x00 0x00 0x02
-
-# CHECK:    addi    r0, r0, 4
-0x20 0x00 0x00 0x04
-
-# CHECK:    addi    r0, r0, 8
-0x20 0x00 0x00 0x08
-
-# CHECK:    addi    r0, r0, 16
-0x20 0x00 0x00 0x10
-
-# CHECK:    addi    r0, r0, 32
-0x20 0x00 0x00 0x20
-
-# CHECK:    addi    r0, r0, 64
-0x20 0x00 0x00 0x40
-
-# CHECK:    addi    r0, r0, 128
-0x20 0x00 0x00 0x80
-
-# CHECK:    addi    r0, r0, 256
-0x20 0x00 0x01 0x00
-
-# CHECK:    addi    r0, r0, 512
-0x20 0x00 0x02 0x00
-
-# CHECK:    addi    r0, r0, 1024
-0x20 0x00 0x04 0x00
-
-# CHECK:    addi    r0, r0, 2048
-0x20 0x00 0x08 0x00
-
-# CHECK:    addi    r0, r0, 4096
-0x20 0x00 0x10 0x00
-
-# CHECK:    addi    r0, r0, 8192
-0x20 0x00 0x20 0x00
-
-# CHECK:    addi    r0, r0, 16384
-0x20 0x00 0x40 0x00
-
-# CHECK:    imm     0
-# CHECK:    addi    r0, r0, -32768
-0xb0 0x00 0x00 0x00 0x20 0x00 0x80 0x00
-
-# CHECK:    imm     1
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x01 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     2
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x02 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     4
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x04 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     8
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x08 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     16
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x10 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     32
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x20 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     64
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x40 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     128
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x00 0x80 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     256
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x01 0x00 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     512
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x02 0x00 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     1024
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x04 0x00 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     2048
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x08 0x00 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     4096
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x10 0x00 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     8192
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x20 0x00 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     16384
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x40 0x00 0x20 0x00 0x00 0x00
-
-# CHECK:    imm     -32768
-# CHECK:    addi    r0, r0, 0
-0xb0 0x00 0x80 0x00 0x20 0x00 0x00 0x00
-
-################################################################################
-# Memory instructions
-################################################################################
-
-# CHECK:    lbu     r1, r2, r3
-0xc0 0x22 0x18 0x00
-
-# CHECK:    lbur    r1, r2, r3
-0xc0 0x22 0x1a 0x00
-
-# CHECK:    lbui    r1, r2, 28
-0xe0 0x22 0x00 0x1c
-
-# CHECK:    lhu     r1, r2, r3
-0xc4 0x22 0x18 0x00
-
-# CHECK:    lhur    r1, r2, r3
-0xc4 0x22 0x1a 0x00
-
-# CHECK:    lhui    r1, r2, 28
-0xe4 0x22 0x00 0x1c
-
-# CHECK:    lw      r1, r2, r3
-0xc8 0x22 0x18 0x00
-
-# CHECK:    lwr    r1, r2, r3
-0xc8 0x22 0x1a 0x00
-
-# CHECK:    lwi     r1, r2, 28
-0xe8 0x22 0x00 0x1c
-
-# CHECK:    lwx      r1, r2, r3
-0xc8 0x22 0x1c 0x00
-
-# CHECK:    sb      r1, r2, r3
-0xd0 0x22 0x18 0x00
-
-# CHECK:    sbr     r1, r2, r3
-0xd0 0x22 0x1a 0x00
-
-# CHECK:    sbi     r1, r2, 28
-0xf0 0x22 0x00 0x1c
-
-# CHECK:    sh      r1, r2, r3
-0xd4 0x22 0x18 0x00
-
-# CHECK:    shr     r1, r2, r3
-0xd4 0x22 0x1a 0x00
-
-# CHECK:    shi     r1, r2, 28
-0xf4 0x22 0x00 0x1c
-
-# CHECK:    sw      r1, r2, r3
-0xd8 0x22 0x18 0x00
-
-# CHECK:    swr    r1, r2, r3
-0xd8 0x22 0x1a 0x00
-
-# CHECK:    swi     r1, r2, 28
-0xf8 0x22 0x00 0x1c
-
-# CHECK:    swx      r1, r2, r3
-0xd8 0x22 0x1c 0x00
-
-################################################################################
-# Special instructions
-################################################################################
-
-# CHECK:    mfs         r0, 0
-0x94 0x00 0x80 0x00
-
-# CHECK:    msrclr      r0, 0
-0x94 0x11 0x00 0x00
-
-# CHECK:    msrset      r0, 0
-0x94 0x10 0x00 0x00
-
-# CHECK:    mts         0, r0
-0x94 0x00 0xc0 0x00
-
-# CHECK:    wdc         r0, r1
-0x90 0x00 0x08 0x64
-
-# CHECK:    wdc.clear   r0, r1
-0x90 0x00 0x08 0x66
-
-# CHECK:    wdc.flush   r0, r1
-0x90 0x00 0x08 0x74
-
-# CHECK:    wic         r0, r1
-0x90 0x00 0x08 0x68
-
-################################################################################
-# Shift instructions
-################################################################################
-
-# CHECK:    bsrl    r1, r2, r3
-0x44 0x22 0x18 0x00
-
-# CHECK:    bsra    r1, r2, r3
-0x44 0x22 0x1a 0x00
-
-# CHECK:    bsll    r1, r2, r3
-0x44 0x22 0x1c 0x00
-
-# CHECK:    bsrli   r1, r2, 0
-0x64 0x22 0x00 0x00
-
-# CHECK:    bsrai   r1, r2, 0
-0x64 0x22 0x02 0x00
-
-# CHECK:    bslli   r1, r2, 0
-0x64 0x22 0x04 0x00
-
-# CHECK:    sra     r1, r2
-0x90 0x22 0x00 0x01
-
-# CHECK:    srl     r1, r2
-0x90 0x22 0x00 0x41
-
-################################################################################
-# Pattern instructions
-################################################################################
-
-# CHECK:    pcmpbf      r0, r1, r2
-0x80 0x01 0x14 0x00
-
-# CHECK:    pcmpne      r0, r1, r2
-0x8c 0x01 0x14 0x00
-
-# CHECK:    pcmpeq      r0, r1, r2
-0x88 0x01 0x14 0x00
-
-################################################################################
-# Opcode disassembly
-################################################################################
-
-# CHECK:    add     r0, r0, r0
-0x00 0x00 0x00 0x00
-
-# CHECK:    add     r1, r1, r1
-0x00 0x21 0x08 0x00
-
-# CHECK:    add     r2, r2, r2
-0x00 0x42 0x10 0x00
-
-# CHECK:    add     r3, r3, r3
-0x00 0x63 0x18 0x00
-
-# CHECK:    add     r4, r4, r4
-0x00 0x84 0x20 0x00
-
-# CHECK:    add     r5, r5, r5
-0x00 0xa5 0x28 0x00
-
-# CHECK:    add     r6, r6, r6
-0x00 0xc6 0x30 0x00
-
-# CHECK:    add     r7, r7, r7
-0x00 0xe7 0x38 0x00
-
-# CHECK:    add     r8, r8, r8
-0x01 0x08 0x40 0x00
-
-# CHECK:    add     r9, r9, r9
-0x01 0x29 0x48 0x00
-
-# CHECK:    add     r10, r10, r10
-0x01 0x4a 0x50 0x00
-
-# CHECK:    add     r11, r11, r11
-0x01 0x6b 0x58 0x00
-
-# CHECK:    add     r12, r12, r12
-0x01 0x8c 0x60 0x00
-
-# CHECK:    add     r13, r13, r13
-0x01 0xad 0x68 0x00
-
-# CHECK:    add     r14, r14, r14
-0x01 0xce 0x70 0x00
-
-# CHECK:    add     r15, r15, r15
-0x01 0xef 0x78 0x00
-
-# CHECK:    add     r16, r16, r16
-0x02 0x10 0x80 0x00
-
-# CHECK:    add     r17, r17, r17
-0x02 0x31 0x88 0x00
-
-# CHECK:    add     r18, r18, r18
-0x02 0x52 0x90 0x00
-
-# CHECK:    add     r19, r19, r19
-0x02 0x73 0x98 0x00
-
-# CHECK:    add     r20, r20, r20
-0x02 0x94 0xa0 0x00
-
-# CHECK:    add     r21, r21, r21
-0x02 0xb5 0xa8 0x00
-
-# CHECK:    add     r22, r22, r22
-0x02 0xd6 0xb0 0x00
-
-# CHECK:    add     r23, r23, r23
-0x02 0xf7 0xb8 0x00
-
-# CHECK:    add     r24, r24, r24
-0x03 0x18 0xc0 0x00
-
-# CHECK:    add     r25, r25, r25
-0x03 0x39 0xc8 0x00
-
-# CHECK:    add     r26, r26, r26
-0x03 0x5a 0xd0 0x00
-
-# CHECK:    add     r27, r27, r27
-0x03 0x7b 0xd8 0x00
-
-# CHECK:    add     r28, r28, r28
-0x03 0x9c 0xe0 0x00
-
-# CHECK:    add     r29, r29, r29
-0x03 0xbd 0xe8 0x00
-
-# CHECK:    add     r30, r30, r30
-0x03 0xde 0xf0 0x00
-
-# CHECK:    add     r31, r31, r31
-0x03 0xff 0xf8 0x00
-
-# CHECK:    addi    r0, r0, 0
-0x20 0x00 0x00 0x00
-
-# CHECK:    addi    r0, r0, 1
-0x20 0x00 0x00 0x01
-
-# CHECK:    addi    r0, r0, 2
-0x20 0x00 0x00 0x02
-
-# CHECK:    addi    r0, r0, 4
-0x20 0x00 0x00 0x04
-
-# CHECK:    addi    r0, r0, 8
-0x20 0x00 0x00 0x08
-
-# CHECK:    addi    r0, r0, 16
-0x20 0x00 0x00 0x10
-
-# CHECK:    addi    r0, r0, 32
-0x20 0x00 0x00 0x20
-
-# CHECK:    addi    r0, r0, 64
-0x20 0x00 0x00 0x40
-
-# CHECK:    addi    r0, r0, 128
-0x20 0x00 0x00 0x80
-
-# CHECK:    addi    r0, r0, 256
-0x20 0x00 0x01 0x00
-
-# CHECK:    addi    r0, r0, 512
-0x20 0x00 0x02 0x00
-
-# CHECK:    addi    r0, r0, 1024
-0x20 0x00 0x04 0x00
-
-# CHECK:    addi    r0, r0, 2048
-0x20 0x00 0x08 0x00
-
-# CHECK:    addi    r0, r0, 4096
-0x20 0x00 0x10 0x00
-
-# CHECK:    addi    r0, r0, 8192
-0x20 0x00 0x20 0x00
-
-# CHECK:    addi    r0, r0, 16384
-0x20 0x00 0x40 0x00
-
-# CHECK:    addi    r0, r0, -1
-0x20 0x00 0xff 0xff
-
-# CHECK:    addi    r0, r0, -2
-0x20 0x00 0xff 0xfe
-
-# CHECK:    addi    r0, r0, -4
-0x20 0x00 0xff 0xfc
-
-# CHECK:    addi    r0, r0, -8
-0x20 0x00 0xff 0xf8
-
-# CHECK:    addi    r0, r0, -16
-0x20 0x00 0xff 0xf0
-
-# CHECK:    addi    r0, r0, -32
-0x20 0x00 0xff 0xe0
-
-# CHECK:    addi    r0, r0, -64
-0x20 0x00 0xff 0xc0
-
-# CHECK:    addi    r0, r0, -128
-0x20 0x00 0xff 0x80
-
-# CHECK:    addi    r0, r0, -256
-0x20 0x00 0xff 0x00
-
-# CHECK:    addi    r0, r0, -512
-0x20 0x00 0xfe 0x00
-
-# CHECK:    addi    r0, r0, -1024
-0x20 0x00 0xfc 0x00
-
-# CHECK:    addi    r0, r0, -2048
-0x20 0x00 0xf8 0x00
-
-# CHECK:    addi    r0, r0, -4096
-0x20 0x00 0xf0 0x00
-
-# CHECK:    addi    r0, r0, -8192
-0x20 0x00 0xe0 0x00
-
-# CHECK:    addi    r0, r0, -16384
-0x20 0x00 0xc0 0x00
-
-# CHECK:    addi    r0, r0, -32768
-0x20 0x00 0x80 0x00
-
-################################################################################
-# FSL instructions
-################################################################################
-
-# CHECK:    get         r0, rfsl0
-0x6c 0x00 0x00 0x00
-
-# CHECK:    nget        r0, rfsl0
-0x6c 0x00 0x40 0x00
-
-# CHECK:    cget        r0, rfsl0
-0x6c 0x00 0x20 0x00
-
-# CHECK:    ncget       r0, rfsl0
-0x6c 0x00 0x60 0x00
-
-# CHECK:    tget        r0, rfsl0
-0x6c 0x00 0x10 0x00
-
-# CHECK:    tnget       r0, rfsl0
-0x6c 0x00 0x50 0x00
-
-# CHECK:    tcget       r0, rfsl0
-0x6c 0x00 0x30 0x00
-
-# CHECK:    tncget      r0, rfsl0
-0x6c 0x00 0x70 0x00
-
-# CHECK:    aget        r0, rfsl0
-0x6c 0x00 0x08 0x00
-
-# CHECK:    naget       r0, rfsl0
-0x6c 0x00 0x48 0x00
-
-# CHECK:    caget       r0, rfsl0
-0x6c 0x00 0x28 0x00
-
-# CHECK:    ncaget      r0, rfsl0
-0x6c 0x00 0x68 0x00
-
-# CHECK:    taget       r0, rfsl0
-0x6c 0x00 0x18 0x00
-
-# CHECK:    tnaget      r0, rfsl0
-0x6c 0x00 0x58 0x00
-
-# CHECK:    tcaget      r0, rfsl0
-0x6c 0x00 0x38 0x00
-
-# CHECK:    tncaget     r0, rfsl0
-0x6c 0x00 0x78 0x00
-
-# CHECK:    eget        r0, rfsl0
-0x6c 0x00 0x04 0x00
-
-# CHECK:    neget       r0, rfsl0
-0x6c 0x00 0x44 0x00
-
-# CHECK:    ecget       r0, rfsl0
-0x6c 0x00 0x24 0x00
-
-# CHECK:    necget      r0, rfsl0
-0x6c 0x00 0x64 0x00
-
-# CHECK:    teget       r0, rfsl0
-0x6c 0x00 0x14 0x00
-
-# CHECK:    tneget      r0, rfsl0
-0x6c 0x00 0x54 0x00
-
-# CHECK:    tecget      r0, rfsl0
-0x6c 0x00 0x34 0x00
-
-# CHECK:    tnecget     r0, rfsl0
-0x6c 0x00 0x74 0x00
-
-# CHECK:    eaget       r0, rfsl0
-0x6c 0x00 0x0c 0x00
-
-# CHECK:    neaget      r0, rfsl0
-0x6c 0x00 0x4c 0x00
-
-# CHECK:    ecaget      r0, rfsl0
-0x6c 0x00 0x2c 0x00
-
-# CHECK:    necaget     r0, rfsl0
-0x6c 0x00 0x6c 0x00
-
-# CHECK:    teaget      r0, rfsl0
-0x6c 0x00 0x1c 0x00
-
-# CHECK:    tneaget     r0, rfsl0
-0x6c 0x00 0x5c 0x00
-
-# CHECK:    tecaget     r0, rfsl0
-0x6c 0x00 0x3c 0x00
-
-# CHECK:    tnecaget    r0, rfsl0
-0x6c 0x00 0x7c 0x00
-
-# CHECK:    getd        r0, r1
-0x4c 0x00 0x08 0x00
-
-# CHECK:    ngetd       r0, r1
-0x4c 0x00 0x0a 0x00
-
-# CHECK:    cgetd       r0, r1
-0x4c 0x00 0x09 0x00
-
-# CHECK:    ncgetd      r0, r1
-0x4c 0x00 0x0b 0x00
-
-# CHECK:    tgetd       r0, r1
-0x4c 0x00 0x08 0x80
-
-# CHECK:    tngetd      r0, r1
-0x4c 0x00 0x0a 0x80
-
-# CHECK:    tcgetd      r0, r1
-0x4c 0x00 0x09 0x80
-
-# CHECK:    tncgetd     r0, r1
-0x4c 0x00 0x0b 0x80
-
-# CHECK:    agetd       r0, r1
-0x4c 0x00 0x08 0x40
-
-# CHECK:    nagetd      r0, r1
-0x4c 0x00 0x0a 0x40
-
-# CHECK:    cagetd     r0, r1
-0x4c 0x00 0x09 0x40
-
-# CHECK:    ncagetd     r0, r1
-0x4c 0x00 0x0b 0x40
-
-# CHECK:    tagetd      r0, r1
-0x4c 0x00 0x08 0xc0
-
-# CHECK:    tnagetd     r0, r1
-0x4c 0x00 0x0a 0xc0
-
-# CHECK:    tcagetd     r0, r1
-0x4c 0x00 0x09 0xc0
-
-# CHECK:    tncagetd    r0, r1
-0x4c 0x00 0x0b 0xc0
-
-# CHECK:    egetd       r0, r1
-0x4c 0x00 0x08 0x20
-
-# CHECK:    negetd      r0, r1
-0x4c 0x00 0x0a 0x20
-
-# CHECK:    ecgetd      r0, r1
-0x4c 0x00 0x09 0x20
-
-# CHECK:    necgetd     r0, r1
-0x4c 0x00 0x0b 0x20
-
-# CHECK:    tegetd      r0, r1
-0x4c 0x00 0x08 0xa0
-
-# CHECK:    tnegetd     r0, r1
-0x4c 0x00 0x0a 0xa0
-
-# CHECK:    tecgetd     r0, r1
-0x4c 0x00 0x09 0xa0
-
-# CHECK:    tnecgetd    r0, r1
-0x4c 0x00 0x0b 0xa0
-
-# CHECK:    eagetd      r0, r1
-0x4c 0x00 0x08 0x60
-
-# CHECK:    neagetd     r0, r1
-0x4c 0x00 0x0a 0x60
-
-# CHECK:    ecagetd     r0, r1
-0x4c 0x00 0x09 0x60
-
-# CHECK:    necagetd    r0, r1
-0x4c 0x00 0x0b 0x60
-
-# CHECK:    teagetd     r0, r1
-0x4c 0x00 0x08 0xe0
-
-# CHECK:    tneagetd    r0, r1
-0x4c 0x00 0x0a 0xe0
-
-# CHECK:    tecagetd    r0, r1
-0x4c 0x00 0x09 0xe0
-
-# CHECK:    tnecagetd   r0, r1
-0x4c 0x00 0x0b 0xe0
-
-# CHECK:    put         r0, rfsl0
-0x6c 0x00 0x80 0x00
-
-# CHECK:    aput        r0, rfsl0
-0x6c 0x00 0x88 0x00
-
-# CHECK:    cput        r0, rfsl0
-0x6c 0x00 0xa0 0x00
-
-# CHECK:    caput       r0, rfsl0
-0x6c 0x00 0xa8 0x00
-
-# CHECK:    nput        r0, rfsl0
-0x6c 0x00 0xc0 0x00
-
-# CHECK:    naput       r0, rfsl0
-0x6c 0x00 0xc8 0x00
-
-# CHECK:    ncput       r0, rfsl0
-0x6c 0x00 0xe0 0x00
-
-# CHECK:    ncaput      r0, rfsl0
-0x6c 0x00 0xe8 0x00
-
-# CHECK:    tput        rfsl0
-0x6c 0x00 0x90 0x00
-
-# CHECK:    taput       rfsl0
-0x6c 0x00 0x98 0x00
-
-# CHECK:    tcput       rfsl0
-0x6c 0x00 0xb0 0x00
-
-# CHECK:    tcaput      rfsl0
-0x6c 0x00 0xb8 0x00
-
-# CHECK:    tnput       rfsl0
-0x6c 0x00 0xd0 0x00
-
-# CHECK:    tnaput      rfsl0
-0x6c 0x00 0xd8 0x00
-
-# CHECK:    tncput      rfsl0
-0x6c 0x00 0xf0 0x00
-
-# CHECK:    tncaput     rfsl0
-0x6c 0x00 0xf8 0x00
-
-# CHECK:    putd        r0, r1
-0x4c 0x00 0x0c 0x00
-
-# CHECK:    aputd       r0, r1
-0x4c 0x00 0x0c 0x40
-
-# CHECK:    cputd       r0, r1
-0x4c 0x00 0x0d 0x00
-
-# CHECK:    caputd      r0, r1
-0x4c 0x00 0x0d 0x40
-
-# CHECK:    nputd       r0, r1
-0x4c 0x00 0x0e 0x00
-
-# CHECK:    naputd      r0, r1
-0x4c 0x00 0x0e 0x40
-
-# CHECK:    ncputd      r0, r1
-0x4c 0x00 0x0f 0x00
-
-# CHECK:    ncaputd     r0, r1
-0x4c 0x00 0x0f 0x40
-
-# CHECK:    tputd       r1
-0x4c 0x00 0x0c 0x80
-
-# CHECK:    taputd      r1
-0x4c 0x00 0x0c 0xc0
-
-# CHECK:    tcputd      r1
-0x4c 0x00 0x0d 0x80
-
-# CHECK:    tcaputd     r1
-0x4c 0x00 0x0d 0xc0
-
-# CHECK:    tnputd      r1
-0x4c 0x00 0x0e 0x80
-
-# CHECK:    tnaputd     r1
-0x4c 0x00 0x0e 0xc0
-
-# CHECK:    tncputd     r1
-0x4c 0x00 0x0f 0x80
-
-# CHECK:    tncaputd    r1
-0x4c 0x00 0x0f 0xc0
-
-# CHECK:    get     r0, rfsl1
-0x6c 0x00 0x00 0x01
-
-# CHECK:    get     r0, rfsl2
-0x6c 0x00 0x00 0x02
-
-# CHECK:    get     r0, rfsl3
-0x6c 0x00 0x00 0x03
-
-# CHECK:    get     r0, rfsl4
-0x6c 0x00 0x00 0x04
-
-# CHECK:    get     r0, rfsl5
-0x6c 0x00 0x00 0x05
-
-# CHECK:    get     r0, rfsl6
-0x6c 0x00 0x00 0x06
-
-# CHECK:    get     r0, rfsl7
-0x6c 0x00 0x00 0x07
-
-# CHECK:    get     r0, rfsl8
-0x6c 0x00 0x00 0x08
-
-# CHECK:    get     r0, rfsl9
-0x6c 0x00 0x00 0x09
-
-# CHECK:    get     r0, rfsl10
-0x6c 0x00 0x00 0x0a
-
-# CHECK:    get     r0, rfsl11
-0x6c 0x00 0x00 0x0b
-
-# CHECK:    get     r0, rfsl12
-0x6c 0x00 0x00 0x0c
-
-# CHECK:    get     r0, rfsl13
-0x6c 0x00 0x00 0x0d
-
-# CHECK:    get     r0, rfsl14
-0x6c 0x00 0x00 0x0e
-
-# CHECK:    get     r0, rfsl15
-0x6c 0x00 0x00 0x0f
diff --git a/test/MC/Disassembler/neon-tests.txt b/test/MC/Disassembler/neon-tests.txt
deleted file mode 100644
index eb9adb7b6c2..00000000000
--- a/test/MC/Disassembler/neon-tests.txt
+++ /dev/null
@@ -1,61 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
-
-# CHECK:	vbif	q15, q7, q0
-0x50 0xe1 0x7e 0xf3
-
-# CHECK:	vcvt.f32.s32	q15, q0, #1
-0x50 0xee 0xff 0xf2
-
-# CHECK:	vdup.32	q3, d1[0]
-0x41 0x6c 0xb4 0xf3
-
-# CHECK:	vld1.8	{d17, d18}, [r6], r5
-0x05 0x1a 0x66 0xf4
-
-# CHECK:        vld1.8  {d17, d18, d19}, [r6], r5
-0x05 0x16 0x66 0xf4
-
-# CHECK:	vld4.8	{d0, d1, d2, d3}, [r2], r7
-0x07 0x00 0x22 0xf4
-
-# CHECK:	vld4.8	{d4, d6, d8, d10}, [r2]
-0x0f 0x41 0x22 0xf4
-
-# CHECK:	vmov	d0, d15
-0x1f 0x01 0x2f 0xf2
-
-# CHECK:	vmov.i64	q6, #0xFF00FF00FF
-0x75 0xce 0x81 0xf2
-
-# CHECK:	vmvn.i32	d0, #0x0
-0x30 0x00 0x80 0xf2
-
-# CHECK:	vmul.f32	d0, d0, d6
-0x16 0x0d 0x00 0xf3
-
-# CHECK:	vneg.f32	q0, q0
-0xc0 0x07 0xb9 0xf3
-
-# CHECK:	vqrdmulh.s32	d0, d0, d3[1]
-0x63 0x0d 0xa0 0xf2
-
-# CHECK:	vrshr.s32	d0, d0, #16
-0x10 0x02 0xb0 0xf2
-
-# CHECK:	vshll.i16	q3, d1, #16
-0x01 0x63 0xb6 0xf3
-
-# CHECK:	vsri.32	q15, q0, #1
-0x50 0xe4 0xff 0xf3
-
-# CHECK:	vtbx.8	d18, {d4, d5, d6}, d7
-0x47 0x2a 0xf4 0xf3
-
-# CHECK: vmov.f32 s0, #5.000000e-01
-0x00 0x0a 0xb6 0xee
-
-# CHECK: vmov.f32 s0, #1.328125e-01
-0x01 0x0a 0xb4 0xee
-
-# CHECK: vmov.f64 d0, #5.000000e-01
-0x00 0x0b 0xb6 0xee
diff --git a/test/MC/Disassembler/simple-tests.txt b/test/MC/Disassembler/simple-tests.txt
deleted file mode 100644
index 13a19d2ca4c..00000000000
--- a/test/MC/Disassembler/simple-tests.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
-
-# CHECK: int	$33
-0xCD 0x21 
-
-# CHECK: int	$33
-0xCD 0x21
-
-
-# CHECK: addb	%al, (%rax)
-0 0
-
-# CHECK: callq	-1234
-0xe8 0x2e 0xfb 0xff 0xff
-
-# CHECK: lfence
-0x0f 0xae 0xe8
-
-# CHECK: mfence
-0x0f 0xae 0xf0
-
-# CHECK: monitor
-0x0f 0x01 0xc8
-
-# CHECK: mwait
-0x0f 0x01 0xc9
-
-# CHECK: vmcall
-0x0f 0x01 0xc1
-
-# CHECK: vmlaunch
-0x0f 0x01 0xc2
-
-# CHECK: vmresume
-0x0f 0x01 0xc3
-
-# CHECK: vmxoff
-0x0f 0x01 0xc4
-
-# CHECK: swapgs
-0x0f 0x01 0xf8
-
-# CHECK: rdtscp
-0x0f 0x01 0xf9
-
-# CHECK: vmxon
-0xf3 0x0f 0xc7 0x30
-
-# CHECK: vmptrld
-0x0f 0xc7 0x30
-
-# CHECK: vmptrst
-0x0f 0xc7 0x38
-
-# CHECK: movl $0, -4(%rbp)
-0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
-
-# CHECK: movq	%cr0, %rcx
-0x0f 0x20 0xc1
-
-# CHECK: leal	4(%rsp), %ecx
-0x8d 0x4c 0x24 0x04 
-
-# CHECK: enter	$1, $2
-0xc8 0x01 0x00 0x02
-
-# CHECK: movw	$47416, -66(%rbp)
-0x66 0xc7 0x45 0xbe 0x38 0xb9
diff --git a/test/MC/Disassembler/thumb-tests.txt b/test/MC/Disassembler/thumb-tests.txt
deleted file mode 100644
index 06d12fed87f..00000000000
--- a/test/MC/Disassembler/thumb-tests.txt
+++ /dev/null
@@ -1,105 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 | FileCheck %s
-
-# CHECK:	add	r5, sp, #68
-0x11 0xad
-
-# CHECK:	adcs	r0, r0, #1
-0x50 0xf1 0x01 0x00
-
-# CHECK:	b	#34
-0x0f 0xe0
-
-# CHECK:	b.w	#-12
-0xff 0xf7 0xf8 0xaf
-
-# CHECK:	bfi	r2, r10, #0, #1
-0x6a 0xf3 0x00 0x02
-
-# CHECK:	cbnz	r7, #20
-0x57 0xb9
-
-# CHECK:	cmp	r3, r4
-0xa3 0x42
-
-# CHECK:	cmn.w	r0, #31
-0x10 0xf1 0x1f 0x0f
-
-# CHECK:	ldmia	r0!, {r1}
-0x02 0xc8
-
-# CHECK:	ldrb.w	r8, #-24
-0x1f 0xf8 0x18 0x80
-
-# CHECK:	ldrd	r0, r1, [r7, #64]!
-0xf7 0xe9 0x10 0x01
-
-# CHECK:	lsls.w	r0, pc, #1
-0x5f 0xea 0x4f 0x00
-
-# CHECK:	mov	r11, r7
-0xbb 0x46
-
-# CHECK:	pkhtb	r2, r4, r6, asr #16
-0xc4 0xea 0x26 0x42
-
-# CHECK-NOT:	pkhbt	r2, r4, r6, lsl #0
-# CHECK:	pkhbt	r2, r4, r6
-0xc4 0xea 0x06 0x02
-
-# CHECK:	pop	{r2, r4, r6, r8, r10, r12}
-0xbd 0xe8 0x54 0x15
-
-# CHECK:	push	{r2, r4, r6, r8, r10, r12}
-0x2d 0xe9 0x54 0x15
-
-# CHECK:	rsbs	r0, r0, #0
-0x40 0x42
-
-# CHECK-NOT:	rsb	r0, r2, r0, lsl #0
-# CHECK:	rsb	r0, r2, r0
-0xc2 0xeb 0x00 0x00
-
-# CHECK-NOT:	ssat	r0, #17, r12, lsl #0
-# CHECK:	ssat	r0, #17, r12
-0x0c 0xf3 0x10 0x00
-
-# CHECK:	strd	r0, [r7, #64]
-0xc7 0xe9 0x10 0x01
-
-# CHECK:	sub	sp, #60
-0x8f 0xb0
-
-# CHECK:	subw	r0, pc, #1
-0xaf 0xf2 0x01 0x00
-
-# CHECK:	subw	r0, sp, #835
-0xad 0xf2 0x43 0x30
-
-# CHECK:	uqadd16	r3, r4, r5
-0x94 0xfa 0x55 0xf3
-
-# CHECK:	usada8	r5, r4, r3, r2
-0x74 0xfb 0x03 0x25
-
-# CHECK:	uxtab16	r1, r2, r3, ror #8
-0x32 0xfa 0x93 0xf1
-
-# IT block begin
-# CHECK:	ittte	eq
-0x03 0xbf
-
-# CHECK:	moveq	r3, #3
-0x03 0x23
-
-# CHECK:	asreq	r1, r0, #5
-0x41 0x11
-
-# CHECK:	lsleq	r1, r0, #28
-0x01 0x07
-
-# CHECK:	stmiane	r0!, {r1, r2, r3}
-0x0e 0xc0
-
-# IT block end
-# CHECK:	rsbs	r1, r2, #0
-0x51 0x42