From: Chris Lattner <sabre@nondot.org>
Date: Tue, 5 Dec 2006 18:25:10 +0000 (+0000)
Subject: Add a perf optzn corresponding to PR1033.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=2beb136e0b7032db586e0ac52bcea742e5209dde;p=oota-llvm.git

Add a perf optzn corresponding to PR1033.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32229 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/README-SSE.txt b/lib/Target/X86/README-SSE.txt
index 2685956dc1a..b80661a5b79 100644
--- a/lib/Target/X86/README-SSE.txt
+++ b/lib/Target/X86/README-SSE.txt
@@ -18,6 +18,11 @@ Think about doing i64 math in SSE regs.
 
 //===---------------------------------------------------------------------===//
 
+Bitcast to<->from SSE registers should use movd/movq instead of going through
+the stack.  Testcase here: CodeGen/X86/bitcast.ll
+
+//===---------------------------------------------------------------------===//
+
 This testcase should have no SSE instructions in it, and only one load from
 a constant pool: