From: Eli Friedman <eli.friedman@gmail.com>
Date: Wed, 7 Dec 2011 22:06:02 +0000 (+0000)
Subject: Fix an assertion in the scheduler.  PR11386.  No testcase included because it's rathe... 
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=30c44e18bf28c3f5feda56e97695e2b72de7fedb;p=oota-llvm.git

Fix an assertion in the scheduler.  PR11386.  No testcase included because it's rather delicate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146083 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index c2d3dd3d60c..98931289ce2 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -811,12 +811,11 @@ void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) {
   for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
        I != E; ++I) {
     if (I->isAssignedRegDep()) {
+      if (!LiveRegDefs[I->getReg()])
+        ++NumLiveRegs;
       // This becomes the nearest def. Note that an earlier def may still be
       // pending if this is a two-address node.
       LiveRegDefs[I->getReg()] = SU;
-      if (!LiveRegDefs[I->getReg()]) {
-        ++NumLiveRegs;
-      }
       if (LiveRegGens[I->getReg()] == NULL ||
           I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight())
         LiveRegGens[I->getReg()] = I->getSUnit();