From: Michael Liao <michael.liao@intel.com>
Date: Thu, 25 Oct 2012 07:06:48 +0000 (+0000)
Subject: Atom has SIMD instruction set extension up to SSSE3
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=32c5eca6e691539c23483e553ce7635d3e363e63;p=oota-llvm.git

Atom has SIMD instruction set extension up to SSSE3



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166665 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index 1dc4aa99892..1b5c4d97539 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -162,7 +162,7 @@ def : Proc<"core2",           [FeatureSSSE3, FeatureCMPXCHG16B,
                                FeatureSlowBTMem]>;
 def : Proc<"penryn",          [FeatureSSE41, FeatureCMPXCHG16B,
                                FeatureSlowBTMem]>;
-def : AtomProc<"atom",        [ProcIntelAtom, FeatureSSE3, FeatureCMPXCHG16B,
+def : AtomProc<"atom",        [ProcIntelAtom, FeatureSSSE3, FeatureCMPXCHG16B,
                                FeatureMOVBE, FeatureSlowBTMem, FeatureLeaForSP,
                                FeatureSlowDivide]>;
 // "Arrandale" along with corei3 and corei5