From: Chris Lattner <sabre@nondot.org>
Date: Mon, 19 Jul 2004 05:02:09 +0000 (+0000)
Subject: Fix assertion to not dereference end!
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=331cb7dde1bf0c52bfd17570d36e56b934d559f5;p=oota-llvm.git

Fix assertion to not dereference end!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14991 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 24508fbbb02..dbed7973fc4 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -399,8 +399,8 @@ void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
         std::vector<LiveInterval*>::iterator addedItEnd = added.end();
         for (IntervalPtrs::iterator i = unhandled_.begin(), e =unhandled_.end();
              i != e && addedIt != addedItEnd; ++i) {
-            while ((*i)->start() > (*addedIt)->start() && 
-                   addedIt != addedItEnd) {
+            while (addedIt != addedItEnd &&
+                   (*i)->start() > (*addedIt)->start()) {
 #ifndef NDEBUG
                 // This code only works if addIntervalsForSpills retursn a
                 // sorted interval list.  Assert this is the case now.