From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Fri, 13 May 2016 02:41:07 +0000 (+0800)
Subject: ARM64: dts: rk3399-evb: add more for pcie for evb board
X-Git-Tag: firefly_0821_release~2627
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=332da300eac54f873be7ed2a7b5da5f380d6d49a;p=firefly-linux-kernel-4.4.55.git

ARM64: dts: rk3399-evb: add more for pcie for evb board

Change-Id: If417c67b7a78898cd23c5a35411d4fe3724336c8
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi
index 8a00be0d582e..2c33ad6be991 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi
@@ -315,6 +315,17 @@
 	};
 };
 
+&pcie0 {
+	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
+	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
+	assigned-clock-rates = <100000000>;
+	ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_clkreqn>;
+	status = "okay";
+};
+
 &tsadc {
 	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */