From: Saleem Abdulrasool <compnerd@compnerd.org>
Date: Sun, 3 Aug 2014 23:00:38 +0000 (+0000)
Subject: CodeGen: silence a warning
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=335c0ca2c667cb6c7bdf35c4286862fbf1f46142;p=oota-llvm.git

CodeGen: silence a warning

GCC 4.8.2 objects to the tautological condition in the assert as the unsigned
value is guaranteed to be >= 0.  Simplify the assertion by dropping the
tautological condition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214671 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/MachineCombiner.cpp b/lib/CodeGen/MachineCombiner.cpp
index 591c4caf66e..9ec7239b098 100644
--- a/lib/CodeGen/MachineCombiner.cpp
+++ b/lib/CodeGen/MachineCombiner.cpp
@@ -144,8 +144,7 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
           InstrIdxForVirtReg.find(MO.getReg());
       if (II != InstrIdxForVirtReg.end()) {
         // Operand is new virtual register not in trace
-        assert(II->second >= 0 && II->second < InstrDepth.size() &&
-               "Bad Index");
+        assert(II->second < InstrDepth.size() && "Bad Index");
         MachineInstr *DefInstr = InsInstrs[II->second];
         assert(DefInstr &&
                "There must be a definition for a new virtual register");