From: Dan Gohman Date: Thu, 27 Oct 2011 22:56:32 +0000 (+0000) Subject: Remove the Alpha backend. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=33ba8b0e96acde0d8ab1ffc565a5ef4c8b6b6ac2;p=oota-llvm.git Remove the Alpha backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143164 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/CMakeLists.txt b/CMakeLists.txt index f3ff1979c96..139169db3d3 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -64,7 +64,6 @@ Please clean the source directory.") endif() set(LLVM_ALL_TARGETS - Alpha ARM CBackend CellSPU diff --git a/autoconf/configure.ac b/autoconf/configure.ac index 89f846749cb..8b64ce11d5d 100644 --- a/autoconf/configure.ac +++ b/autoconf/configure.ac @@ -352,7 +352,6 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch], amd64-* | x86_64-*) llvm_cv_target_arch="x86_64" ;; sparc*-*) llvm_cv_target_arch="Sparc" ;; powerpc*-*) llvm_cv_target_arch="PowerPC" ;; - alpha*-*) llvm_cv_target_arch="Alpha" ;; arm*-*) llvm_cv_target_arch="ARM" ;; mips-*) llvm_cv_target_arch="Mips" ;; xcore-*) llvm_cv_target_arch="XCore" ;; @@ -487,7 +486,6 @@ else Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;; PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;; x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;; - Alpha) AC_SUBST(TARGET_HAS_JIT,0) ;; ARM) AC_SUBST(TARGET_HAS_JIT,1) ;; Mips) AC_SUBST(TARGET_HAS_JIT,1) ;; XCore) AC_SUBST(TARGET_HAS_JIT,0) ;; @@ -603,21 +601,20 @@ dnl Allow specific targets to be specified for building (or not) TARGETS_TO_BUILD="" AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets], [Build specific host targets: all or target1,target2,... Valid targets are: - host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu, + host, x86, x86_64, sparc, powerpc, arm, mips, spu, xcore, msp430, ptx, cbe, and cpp (default=all)]),, enableval=all) if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;; powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;; - alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;; arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; @@ -632,7 +629,6 @@ case "$enableval" in x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; Sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;; PowerPC) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;; - Alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;; ARM) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; Mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; MBlaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; diff --git a/cmake/config-ix.cmake b/cmake/config-ix.cmake index 0381dbf4963..18549a3b22c 100755 --- a/cmake/config-ix.cmake +++ b/cmake/config-ix.cmake @@ -309,8 +309,6 @@ elseif (LLVM_NATIVE_ARCH MATCHES "sparc") set(LLVM_NATIVE_ARCH Sparc) elseif (LLVM_NATIVE_ARCH MATCHES "powerpc") set(LLVM_NATIVE_ARCH PowerPC) -elseif (LLVM_NATIVE_ARCH MATCHES "alpha") - set(LLVM_NATIVE_ARCH Alpha) elseif (LLVM_NATIVE_ARCH MATCHES "arm") set(LLVM_NATIVE_ARCH ARM) elseif (LLVM_NATIVE_ARCH MATCHES "mips") diff --git a/configure b/configure index a82cccb3f91..a1eb3b1d5d7 100755 --- a/configure +++ b/configure @@ -1415,7 +1415,7 @@ Optional Features: (default is YES) --enable-targets Build specific host targets: all or target1,target2,... Valid targets are: host, x86, - x86_64, sparc, powerpc, alpha, arm, mips, spu, + x86_64, sparc, powerpc, arm, mips, spu, xcore, msp430, ptx, cbe, and cpp (default=all) --enable-cbe-printf-a Enable C Backend output with hex floating point via %a (default is YES) @@ -3874,7 +3874,6 @@ else amd64-* | x86_64-*) llvm_cv_target_arch="x86_64" ;; sparc*-*) llvm_cv_target_arch="Sparc" ;; powerpc*-*) llvm_cv_target_arch="PowerPC" ;; - alpha*-*) llvm_cv_target_arch="Alpha" ;; arm*-*) llvm_cv_target_arch="ARM" ;; mips-*) llvm_cv_target_arch="Mips" ;; xcore-*) llvm_cv_target_arch="XCore" ;; @@ -5071,8 +5070,6 @@ else PowerPC) TARGET_HAS_JIT=1 ;; x86_64) TARGET_HAS_JIT=1 - ;; - Alpha) TARGET_HAS_JIT=0 ;; ARM) TARGET_HAS_JIT=1 ;; @@ -5270,14 +5267,13 @@ if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;; powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;; - alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;; arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; @@ -5292,7 +5288,6 @@ case "$enableval" in x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; Sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;; PowerPC) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;; - Alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;; ARM) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; Mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; MBlaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; diff --git a/docs/CMake.html b/docs/CMake.html index ac07b0d6d44..90ead41df5e 100644 --- a/docs/CMake.html +++ b/docs/CMake.html @@ -249,7 +249,7 @@
Semicolon-separated list of targets to build, or all for building all targets. Case-sensitive. For Visual C++ defaults to X86. On the other cases defaults to all. Example: - -DLLVM_TARGETS_TO_BUILD="X86;PowerPC;Alpha".
+ -DLLVM_TARGETS_TO_BUILD="X86;PowerPC".
LLVM_BUILD_TOOLS:BOOL
Build LLVM tools. Defaults to ON. Targets for building each tool diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index 8bb680c4879..15344da16d9 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -2208,7 +2208,6 @@ is the key:

Feature ARM - Alpha CellSPU MBlaze MSP430 @@ -2223,7 +2222,6 @@ is the key:

is generally reliable - @@ -2238,7 +2236,6 @@ is the key:

assembly parser - @@ -2253,7 +2250,6 @@ is the key:

disassembler - @@ -2268,7 +2264,6 @@ is the key:

inline asm - @@ -2283,7 +2278,6 @@ is the key:

jit * - @@ -2298,7 +2292,6 @@ is the key:

.o file writing - @@ -2313,7 +2306,6 @@ is the key:

tail calls - diff --git a/docs/CompilerWriterInfo.html b/docs/CompilerWriterInfo.html index d9201fc8a4e..857a1d413a4 100644 --- a/docs/CompilerWriterInfo.html +++ b/docs/CompilerWriterInfo.html @@ -21,7 +21,6 @@
  1. Hardware
      -
    1. Alpha
    2. ARM
    3. Itanium
    4. MIPS
      5. @@ -48,17 +47,6 @@
      - -

      Alpha

      - -
      - -
      -

      ARM

      diff --git a/docs/UsingLibraries.html b/docs/UsingLibraries.html index 29734525329..0c58e54cb5a 100644 --- a/docs/UsingLibraries.html +++ b/docs/UsingLibraries.html @@ -126,8 +126,6 @@ Aggressive instruction selector for directed acyclic graphs Target Libraries - LLVMAlpha.o - Code generation for Alpha architecture LLVMARM.o Code generation for ARM architecture LLVMCBackend.o @@ -333,14 +331,6 @@
    5. libLLVMSystem.a
    6. libLLVMTarget.a
-
LLVMAlpha.o
LLVMCBackend.o