From: 许盛飞 <xsf@rock-chips.com>
Date: Mon, 28 Jul 2014 03:49:39 +0000 (+0800)
Subject: rk312x: add pwm at dtsi
X-Git-Tag: firefly_0821_release~4916^2~147
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=348b6a1bd4fa135f3e0b0810f866b8522fde46d0;p=firefly-linux-kernel-4.4.55.git

rk312x: add pwm at dtsi
---

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 64e0c08a0c50..4dd787fd4499 100755
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -498,10 +498,10 @@
 		compatible = "rockchip,rk-pwm";
 		reg = <0x20050000 0x10>;
 		#pwm-cells = <2>;
-	//	pinctrl-names = "default";
-	//	pinctrl-0 = <&pwm0_pin>;
-	//	clocks = <&clk_gates7 10>;
-	//	clock-names = "pclk_pwm";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&clk_gates7 10>;
+		clock-names = "pclk_pwm";
 		status = "disabled";
 	};
 
@@ -509,10 +509,10 @@
                 compatible = "rockchip,rk-pwm";
                 reg = <0x20050010 0x10>;
                 #pwm-cells = <2>;
-        //        pinctrl-names = "default";
-       //         pinctrl-0 = <&pwm1_pin>;
-        //        clocks = <&clk_gates7 10>;
-        //        clock-names = "pclk_pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm1_pin>;
+                clocks = <&clk_gates7 10>;
+                clock-names = "pclk_pwm";
                 status = "disabled";
         };
 
@@ -520,10 +520,10 @@
                 compatible = "rockchip,rk-pwm";
                 reg = <0x20050020 0x10>;
                 #pwm-cells = <2>;
-        //        pinctrl-names = "default";
-        //        pinctrl-0 = <&pwm2_pin>;
-         //       clocks = <&clk_gates7 10>;
-         //       clock-names = "pclk_pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm2_pin>;
+                clocks = <&clk_gates7 10>;
+                clock-names = "pclk_pwm";
                 status = "disabled";
         };
 
@@ -531,10 +531,10 @@
                 compatible = "rockchip,rk-pwm";
                 reg = <0x20050030 0x10>;
                 #pwm-cells = <2>;
-       //         pinctrl-names = "default";
-       //         pinctrl-0 = <&pwm3_pin>;
-       //         clocks = <&clk_gates7 10>;
-       //         clock-names = "pclk_pwm";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm3_pin>;
+                clocks = <&clk_gates7 10>;
+                clock-names = "pclk_pwm";
                 status = "disabled";
         };