From: Misha Brukman Date: Mon, 21 Jun 2004 17:25:55 +0000 (+0000) Subject: Type::getPrimitiveID() -> getTypeID() X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=358829f1510031794ed9419ac869ab31c31c337f;p=oota-llvm.git Type::getPrimitiveID() -> getTypeID() git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14288 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index c9c0e2d870a..af5e16ea4f7 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -39,7 +39,7 @@ namespace { /// size of the type, and whether or not it is floating point. /// static inline TypeClass getClass(const Type *Ty) { - switch (Ty->getPrimitiveID()) { + switch (Ty->getTypeID()) { case Type::SByteTyID: case Type::UByteTyID: return cByte; // Byte operands are class #0 case Type::ShortTyID: @@ -2306,7 +2306,7 @@ void ISel::emitCastOperation(MachineBasicBlock *BB, } unsigned TmpReg = makeAnotherReg(Type::IntTy); - switch (SrcTy->getPrimitiveID()) { + switch (SrcTy->getTypeID()) { case Type::BoolTyID: case Type::SByteTyID: BuildMI(*BB, IP, PPC32::EXTSB, 1, TmpReg).addReg(SrcReg); @@ -2411,7 +2411,7 @@ void ISel::visitVANextInst(VANextInst &I) { unsigned DestReg = getReg(I); unsigned Size; - switch (I.getArgType()->getPrimitiveID()) { + switch (I.getArgType()->getTypeID()) { default: std::cerr << I; assert(0 && "Error: bad type for va_next instruction!"); @@ -2436,7 +2436,7 @@ void ISel::visitVAArgInst(VAArgInst &I) { unsigned VAList = getReg(I.getOperand(0)); unsigned DestReg = getReg(I); - switch (I.getType()->getPrimitiveID()) { + switch (I.getType()->getTypeID()) { default: std::cerr << I; assert(0 && "Error: bad type for va_next instruction!"); diff --git a/lib/Target/PowerPC/PowerPCISelSimple.cpp b/lib/Target/PowerPC/PowerPCISelSimple.cpp index c9c0e2d870a..af5e16ea4f7 100644 --- a/lib/Target/PowerPC/PowerPCISelSimple.cpp +++ b/lib/Target/PowerPC/PowerPCISelSimple.cpp @@ -39,7 +39,7 @@ namespace { /// size of the type, and whether or not it is floating point. /// static inline TypeClass getClass(const Type *Ty) { - switch (Ty->getPrimitiveID()) { + switch (Ty->getTypeID()) { case Type::SByteTyID: case Type::UByteTyID: return cByte; // Byte operands are class #0 case Type::ShortTyID: @@ -2306,7 +2306,7 @@ void ISel::emitCastOperation(MachineBasicBlock *BB, } unsigned TmpReg = makeAnotherReg(Type::IntTy); - switch (SrcTy->getPrimitiveID()) { + switch (SrcTy->getTypeID()) { case Type::BoolTyID: case Type::SByteTyID: BuildMI(*BB, IP, PPC32::EXTSB, 1, TmpReg).addReg(SrcReg); @@ -2411,7 +2411,7 @@ void ISel::visitVANextInst(VANextInst &I) { unsigned DestReg = getReg(I); unsigned Size; - switch (I.getArgType()->getPrimitiveID()) { + switch (I.getArgType()->getTypeID()) { default: std::cerr << I; assert(0 && "Error: bad type for va_next instruction!"); @@ -2436,7 +2436,7 @@ void ISel::visitVAArgInst(VAArgInst &I) { unsigned VAList = getReg(I.getOperand(0)); unsigned DestReg = getReg(I); - switch (I.getType()->getPrimitiveID()) { + switch (I.getType()->getTypeID()) { default: std::cerr << I; assert(0 && "Error: bad type for va_next instruction!");