From: Owen Anderson Date: Wed, 10 Sep 2008 20:41:13 +0000 (+0000) Subject: Fix a bug in the coalescer where it didn't check if a live interval existed before... X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=369e98760bfdd6a72ef64929f3c560f80a4ffc92;p=oota-llvm.git Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This was exposed by fast isel's handling of shifts on X86-64. With this, FreeBench/pcompress2 passes on X86-64 in fast isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56067 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index cca891d7735..c6d4576e9c9 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -464,7 +464,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, MachineOperand &MO = CopyMI->getOperand(i); if (MO.isReg() && MO.isImplicit()) NewMI->addOperand(MO); - if (MO.isDef()) { + if (MO.isDef() && li_->hasInterval(MO.getReg())) { unsigned Reg = MO.getReg(); DLR = li_->getInterval(Reg).getLiveRangeContaining(DefIdx); if (DLR && DLR->valno->copy == CopyMI)