From: Alex Deucher Date: Tue, 23 Sep 2014 14:20:13 +0000 (-0400) Subject: drm/radeon/cik: use a separate counter for CP init timeout X-Git-Tag: firefly_0821_release~176^2~3177^2^2 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=370ce45b5986118fa496dddbcd7039e1aa1a418f;p=firefly-linux-kernel-4.4.55.git drm/radeon/cik: use a separate counter for CP init timeout Otherwise we may fail to init the second compute ring. Noticed-by: Christian König Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org --- diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 98dbaea21d08..3d546c606b43 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -4803,7 +4803,7 @@ struct bonaire_mqd */ static int cik_cp_compute_resume(struct radeon_device *rdev) { - int r, i, idx; + int r, i, j, idx; u32 tmp; bool use_doorbell = true; u64 hqd_gpu_addr; @@ -4922,7 +4922,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev) mqd->queue_state.cp_hqd_pq_wptr= 0; if (RREG32(CP_HQD_ACTIVE) & 1) { WREG32(CP_HQD_DEQUEUE_REQUEST, 1); - for (i = 0; i < rdev->usec_timeout; i++) { + for (j = 0; j < rdev->usec_timeout; j++) { if (!(RREG32(CP_HQD_ACTIVE) & 1)) break; udelay(1);