From: Wu Liang feng <wulf@rock-chips.com>
Date: Thu, 24 Mar 2016 11:39:15 +0000 (+0800)
Subject: ARM64: dts: rk3399: add some properties to config dwc3
X-Git-Tag: firefly_0821_release~3009
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=374068a81a7d87eb6c50a91a84dc0c81cf1225a4;p=firefly-linux-kernel-4.4.55.git

ARM64: dts: rk3399: add some properties to config dwc3

RK3399 dwc3 has some hardware properties, which is platform
dependent, including the following properties:
1. Set PHYIF to 1 to use 16-bit UTMI+ interface;
2. Clear ENBLSLPM to 0 to disable sleep and l1 suspend;
3. Clear U2_FREECLK_EXITSTS to 0;
4. Clear DEV_FORCE_20_CLK_FOR_30_CLK to 0;
5. Clear DELAYP1TRANS to 0;

Change-Id: I85de326e3c2177c66966f1239bcab838df01492d
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 04ba3e8dde1c..9274d17a52b6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -389,6 +389,10 @@
 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 			dr_mode = "otg";
 			tx-fifo-resize;
+			snps,dis_enblslpm_quirk;
+			snps,phyif_utmi_16_bits;
+			snps,dis_u2_freeclk_exists_quirk;
+			snps,dis_del_phy_power_chg_quirk;
 			status = "disabled";
 		};
 	};
@@ -413,6 +417,10 @@
 			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			dr_mode = "otg";
 			tx-fifo-resize;
+			snps,dis_enblslpm_quirk;
+			snps,phyif_utmi_16_bits;
+			snps,dis_u2_freeclk_exists_quirk;
+			snps,dis_del_phy_power_chg_quirk;
 			status = "disabled";
 		};
 	};