From: Chris Lattner Date: Sun, 28 Dec 2003 09:46:33 +0000 (+0000) Subject: Eliminate some code that is not needed now that we have the intrinsic lowering pass X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=37b1826aab4614da2196d1b32d7a97cb9fcb3a21;p=oota-llvm.git Eliminate some code that is not needed now that we have the intrinsic lowering pass git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10628 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp index c5fa145a8ef..853da7e8e47 100644 --- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp +++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp @@ -1393,11 +1393,12 @@ AllUsesAreBranches(const Instruction* setccI) // instead of a regular call. If not that kind of intrinsic, do nothing. // Returns true if code was generated, otherwise false. // -bool CodeGenIntrinsic(Intrinsic::ID iid, CallInst &callInstr, - TargetMachine &target, - std::vector& mvec) -{ +static bool CodeGenIntrinsic(Intrinsic::ID iid, CallInst &callInstr, + TargetMachine &target, + std::vector& mvec) { switch (iid) { + default: + assert(0 && "Unknown intrinsic function call should have been lowered!"); case Intrinsic::va_start: { // Get the address of the first incoming vararg argument on the stack bool ignore; @@ -1422,47 +1423,6 @@ bool CodeGenIntrinsic(Intrinsic::ID iid, CallInst &callInstr, addReg(callInstr.getOperand(1)). addRegDef(&callInstr)); return true; - - case Intrinsic::sigsetjmp: - case Intrinsic::setjmp: { - // act as if we return 0 - unsigned g0 = target.getRegInfo().getZeroRegNum(); - mvec.push_back(BuildMI(V9::ORr,3).addMReg(g0).addMReg(g0) - .addReg(&callInstr, MOTy::Def)); - return true; - } - - case Intrinsic::siglongjmp: - case Intrinsic::longjmp: { - // call abort() - Module* M = callInstr.getParent()->getParent()->getParent(); - const FunctionType *voidvoidFuncTy = - FunctionType::get(Type::VoidTy, std::vector(), false); - Function *F = M->getOrInsertFunction("abort", voidvoidFuncTy); - assert(F && "Unable to get or create `abort' function declaration"); - - // Create hidden virtual register for return address with type void* - TmpInstruction* retAddrReg = - new TmpInstruction(MachineCodeForInstruction::get(&callInstr), - PointerType::get(Type::VoidTy), &callInstr); - - // Use a descriptor to pass information about call arguments - // to the register allocator. This descriptor will be "owned" - // and freed automatically when the MachineCodeForInstruction - // object for the callInstr goes away. - CallArgsDescriptor* argDesc = - new CallArgsDescriptor(&callInstr, retAddrReg, false, false); - - MachineInstr* callMI = BuildMI(V9::CALL, 1).addPCDisp(F); - callMI->addImplicitRef(retAddrReg, /*isDef*/ true); - - mvec.push_back(callMI); - mvec.push_back(BuildMI(V9::NOP, 0)); - return true; - } - - default: - return false; } } diff --git a/lib/Target/SparcV9/SparcV9JITInfo.h b/lib/Target/SparcV9/SparcV9JITInfo.h index 558d1d433b5..d1000fe8da9 100644 --- a/lib/Target/SparcV9/SparcV9JITInfo.h +++ b/lib/Target/SparcV9/SparcV9JITInfo.h @@ -18,10 +18,13 @@ namespace llvm { class TargetMachine; + class IntrinsicLowering; + class SparcJITInfo : public TargetJITInfo { TargetMachine &TM; + IntrinsicLowering &IL; public: - SparcJITInfo(TargetMachine &tm) : TM(tm) {} + SparcJITInfo(TargetMachine &tm, IntrinsicLowering &il) : TM(tm), IL(il) {} /// addPassesToJITCompile - Add passes to the specified pass manager to /// implement a fast dynamic compiler for this target. Return true if this diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp index c608ca37c2e..f5ac9a5babb 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp +++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp @@ -14,6 +14,7 @@ //===----------------------------------------------------------------------===// #include "llvm/Function.h" +#include "llvm/IntrinsicLowering.h" #include "llvm/PassManager.h" #include "llvm/Assembly/PrintModulePass.h" #include "llvm/CodeGen/InstrSelection.h" @@ -114,13 +115,18 @@ FunctionPass *llvm::createSparcMachineCodeDestructionPass() { } -SparcTargetMachine::SparcTargetMachine() +SparcTargetMachine::SparcTargetMachine(IntrinsicLowering *il) : TargetMachine("UltraSparc-Native", false), + IL(il ? il : new DefaultIntrinsicLowering()), schedInfo(*this), regInfo(*this), frameInfo(*this), cacheInfo(*this), - jitInfo(*this) { + jitInfo(*this, *IL) { +} + +SparcTargetMachine::~SparcTargetMachine() { + delete IL; } // addPassesToEmitAssembly - This method controls the entire code generation @@ -165,7 +171,7 @@ SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) PM.add(new PrintFunctionPass("Input code to instr. selection:\n", &std::cerr)); - PM.add(createInstructionSelectionPass(*this)); + PM.add(createInstructionSelectionPass(*this, *IL)); if (!DisableSched) PM.add(createInstructionSchedulingWithSSAPass(*this)); @@ -187,7 +193,7 @@ SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) // function has been emitted. // PM.add(createAsmPrinterPass(Out, *this)); - PM.add(createSparcMachineCodeDestructionPass()); // Free stuff no longer needed + PM.add(createSparcMachineCodeDestructionPass()); // Free mem no longer needed // Emit bytecode to the assembly file into its special section next if (EmitMappingInfo) @@ -232,7 +238,7 @@ void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { //PM.add(createLICMPass()); //PM.add(createGCSEPass()); - PM.add(createInstructionSelectionPass(TM)); + PM.add(createInstructionSelectionPass(TM, IL)); PM.add(getRegisterAllocator(TM)); PM.add(createPrologEpilogInsertionPass()); @@ -246,6 +252,7 @@ void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface) //---------------------------------------------------------------------------- -TargetMachine *llvm::allocateSparcTargetMachine(const Module &M) { - return new SparcTargetMachine(); +TargetMachine *llvm::allocateSparcTargetMachine(const Module &M, + IntrinsicLowering *IL) { + return new SparcTargetMachine(IL); } diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.h b/lib/Target/SparcV9/SparcV9TargetMachine.h index 0dc109dcf42..4ebd3dc1698 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.h +++ b/lib/Target/SparcV9/SparcV9TargetMachine.h @@ -7,15 +7,13 @@ // //===----------------------------------------------------------------------===// // -// This file declares the primary interface to machine description for the -// UltraSPARC. +// This file declares the top-level UltraSPARC target machine. // //===----------------------------------------------------------------------===// #ifndef SPARC_TARGETMACHINE_H #define SPARC_TARGETMACHINE_H -#include "llvm/PassManager.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetMachine.h" #include "SparcInstrInfo.h" @@ -25,8 +23,11 @@ #include "SparcJITInfo.h" namespace llvm { + class PassManager; + class IntrinsicLowering; class SparcTargetMachine : public TargetMachine { + IntrinsicLowering *IL; SparcInstrInfo instrInfo; SparcSchedInfo schedInfo; SparcRegInfo regInfo; @@ -34,8 +35,9 @@ class SparcTargetMachine : public TargetMachine { SparcCacheInfo cacheInfo; SparcJITInfo jitInfo; public: - SparcTargetMachine(); - + SparcTargetMachine(IntrinsicLowering *IL); + ~SparcTargetMachine(); + virtual const TargetInstrInfo &getInstrInfo() const { return instrInfo; } virtual const TargetSchedInfo &getSchedInfo() const { return schedInfo; } virtual const TargetRegInfo &getRegInfo() const { return regInfo; }