From: Simon Pilgrim Date: Mon, 26 Jan 2015 21:28:32 +0000 (+0000) Subject: Line endings fix. NFC. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=38c35f3e2c7358c90bc9840f33b24f68f2b72446;p=oota-llvm.git Line endings fix. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227138 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/avx-splat.ll b/test/CodeGen/X86/avx-splat.ll index 37fce6c10d8..c7e8b3b6b8b 100644 --- a/test/CodeGen/X86/avx-splat.ll +++ b/test/CodeGen/X86/avx-splat.ll @@ -15,37 +15,37 @@ define <16 x i16> @funcB(<16 x i16> %a) nounwind uwtable readnone ssp { entry: %shuffle = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> ret <16 x i16> %shuffle -} - -; CHECK: vmovq -; CHECK-NEXT: vmovddup %xmm -; CHECK-NEXT: vinsertf128 $1 -define <4 x i64> @funcC(i64 %q) nounwind uwtable readnone ssp { -entry: +} + +; CHECK: vmovq +; CHECK-NEXT: vmovddup %xmm +; CHECK-NEXT: vinsertf128 $1 +define <4 x i64> @funcC(i64 %q) nounwind uwtable readnone ssp { +entry: %vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0 %vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1 %vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2 %vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32 3 - ret <4 x i64> %vecinit6.i -} - -; CHECK: vmovddup %xmm -; CHECK-NEXT: vinsertf128 $1 -define <4 x double> @funcD(double %q) nounwind uwtable readnone ssp { -entry: + ret <4 x i64> %vecinit6.i +} + +; CHECK: vmovddup %xmm +; CHECK-NEXT: vinsertf128 $1 +define <4 x double> @funcD(double %q) nounwind uwtable readnone ssp { +entry: %vecinit.i = insertelement <4 x double> undef, double %q, i32 0 %vecinit2.i = insertelement <4 x double> %vecinit.i, double %q, i32 1 %vecinit4.i = insertelement <4 x double> %vecinit2.i, double %q, i32 2 %vecinit6.i = insertelement <4 x double> %vecinit4.i, double %q, i32 3 ret <4 x double> %vecinit6.i } - -; Test this turns into a broadcast: -; shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0> -; -; CHECK: vbroadcastss -define <8 x float> @funcE() nounwind { -allocas: + +; Test this turns into a broadcast: +; shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0> +; +; CHECK: vbroadcastss +define <8 x float> @funcE() nounwind { +allocas: %udx495 = alloca [18 x [18 x float]], align 32 br label %for_test505.preheader diff --git a/test/CodeGen/X86/avx2-vbroadcast.ll b/test/CodeGen/X86/avx2-vbroadcast.ll index a24cdef585a..83100a8691f 100644 --- a/test/CodeGen/X86/avx2-vbroadcast.ll +++ b/test/CodeGen/X86/avx2-vbroadcast.ll @@ -314,13 +314,13 @@ define <2 x i64> @_inreg2xi64(<2 x i64> %a) { define <4 x double> @_inreg4xdouble(<4 x double> %a) { %b = shufflevector <4 x double> %a, <4 x double> undef, <4 x i32> zeroinitializer ret <4 x double> %b -} - -;CHECK-LABEL: _inreg2xdouble: -;CHECK: vmovddup -;CHECK: ret -define <2 x double> @_inreg2xdouble(<2 x double> %a) { - %b = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> zeroinitializer +} + +;CHECK-LABEL: _inreg2xdouble: +;CHECK: vmovddup +;CHECK: ret +define <2 x double> @_inreg2xdouble(<2 x double> %a) { + %b = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> zeroinitializer ret <2 x double> %b } diff --git a/test/CodeGen/X86/sincos-opt.ll b/test/CodeGen/X86/sincos-opt.ll index 1509f5848f6..9d02bcd9a6c 100644 --- a/test/CodeGen/X86/sincos-opt.ll +++ b/test/CodeGen/X86/sincos-opt.ll @@ -12,14 +12,14 @@ entry: ; GNU_SINCOS: callq sincosf ; GNU_SINCOS: movss 4(%rsp), %xmm0 ; GNU_SINCOS: addss (%rsp), %xmm0 - -; OSX_SINCOS-LABEL: test1: -; OSX_SINCOS: callq ___sincosf_stret -; OSX_SINCOS: movshdup {{.*}} xmm1 = xmm0[1,1,3,3] -; OSX_SINCOS: addss %xmm1, %xmm0 - -; OSX_NOOPT: test1 -; OSX_NOOPT: callq _sinf + +; OSX_SINCOS-LABEL: test1: +; OSX_SINCOS: callq ___sincosf_stret +; OSX_SINCOS: movshdup {{.*}} xmm1 = xmm0[1,1,3,3] +; OSX_SINCOS: addss %xmm1, %xmm0 + +; OSX_NOOPT: test1 +; OSX_NOOPT: callq _sinf ; OSX_NOOPT: callq _cosf %call = tail call float @sinf(float %x) nounwind readnone %call1 = tail call float @cosf(float %x) nounwind readnone diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll index 65edb7f2c3e..187bdb63e4d 100644 --- a/test/CodeGen/X86/sse41.ll +++ b/test/CodeGen/X86/sse41.ll @@ -288,26 +288,26 @@ declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone ; This used to compile to insertps $0 + insertps $16. insertps $0 is always ; pointless. -define <2 x float> @buildvector(<2 x float> %A, <2 x float> %B) nounwind { -; X32-LABEL: buildvector: -; X32: ## BB#0: ## %entry -; X32-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] -; X32-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3] -; X32-NEXT: addss %xmm1, %xmm0 -; X32-NEXT: addss %xmm2, %xmm3 -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3] -; X32-NEXT: retl -; -; X64-LABEL: buildvector: -; X64: ## BB#0: ## %entry -; X64-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] -; X64-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3] -; X64-NEXT: addss %xmm1, %xmm0 -; X64-NEXT: addss %xmm2, %xmm3 -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3] -; X64-NEXT: retq -entry: - %tmp7 = extractelement <2 x float> %A, i32 0 +define <2 x float> @buildvector(<2 x float> %A, <2 x float> %B) nounwind { +; X32-LABEL: buildvector: +; X32: ## BB#0: ## %entry +; X32-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] +; X32-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3] +; X32-NEXT: addss %xmm1, %xmm0 +; X32-NEXT: addss %xmm2, %xmm3 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3] +; X32-NEXT: retl +; +; X64-LABEL: buildvector: +; X64: ## BB#0: ## %entry +; X64-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] +; X64-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3] +; X64-NEXT: addss %xmm1, %xmm0 +; X64-NEXT: addss %xmm2, %xmm3 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3] +; X64-NEXT: retq +entry: + %tmp7 = extractelement <2 x float> %A, i32 0 %tmp5 = extractelement <2 x float> %A, i32 1 %tmp3 = extractelement <2 x float> %B, i32 0 %tmp1 = extractelement <2 x float> %B, i32 1 diff --git a/test/CodeGen/X86/v2f32.ll b/test/CodeGen/X86/v2f32.ll index 27ef7de9f27..7beed52295e 100644 --- a/test/CodeGen/X86/v2f32.ll +++ b/test/CodeGen/X86/v2f32.ll @@ -2,21 +2,21 @@ ; RUN: llc < %s -mcpu=yonah -march=x86 -mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32 ; PR7518 -define void @test1(<2 x float> %Q, float *%P2) nounwind { -; X64-LABEL: test1: -; X64: # BB#0: -; X64-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] -; X64-NEXT: addss %xmm0, %xmm1 -; X64-NEXT: movss %xmm1, (%rdi) -; X64-NEXT: retq -; -; X32-LABEL: test1: -; X32: # BB#0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] -; X32-NEXT: addss %xmm0, %xmm1 -; X32-NEXT: movss %xmm1, (%eax) -; X32-NEXT: retl +define void @test1(<2 x float> %Q, float *%P2) nounwind { +; X64-LABEL: test1: +; X64: # BB#0: +; X64-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] +; X64-NEXT: addss %xmm0, %xmm1 +; X64-NEXT: movss %xmm1, (%rdi) +; X64-NEXT: retq +; +; X32-LABEL: test1: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] +; X32-NEXT: addss %xmm0, %xmm1 +; X32-NEXT: movss %xmm1, (%eax) +; X32-NEXT: retl %a = extractelement <2 x float> %Q, i32 0 %b = extractelement <2 x float> %Q, i32 1 %c = fadd float %a, %b diff --git a/test/CodeGen/X86/vec_cast2.ll b/test/CodeGen/X86/vec_cast2.ll index 0762b3500fd..ab391889b71 100644 --- a/test/CodeGen/X86/vec_cast2.ll +++ b/test/CodeGen/X86/vec_cast2.ll @@ -115,22 +115,22 @@ define <8 x i8> @foo3_8(<8 x float> %src) { ; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %eax ; CHECK-WIDE-NEXT: shll $8, %eax ; CHECK-WIDE-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] -; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %ecx -; CHECK-WIDE-NEXT: movzbl %cl, %ecx -; CHECK-WIDE-NEXT: orl %eax, %ecx -; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] -; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %eax -; CHECK-WIDE-NEXT: shll $8, %eax -; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %edx -; CHECK-WIDE-NEXT: movzbl %dl, %edx -; CHECK-WIDE-NEXT: orl %eax, %edx -; CHECK-WIDE-NEXT: vpinsrw $0, %edx, %xmm0, %xmm1 -; CHECK-WIDE-NEXT: vpinsrw $1, %ecx, %xmm1, %xmm1 -; CHECK-WIDE-NEXT: vextractf128 $1, %ymm0, %xmm0 -; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] -; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax -; CHECK-WIDE-NEXT: shll $8, %eax -; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %ecx +; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %ecx +; CHECK-WIDE-NEXT: movzbl %cl, %ecx +; CHECK-WIDE-NEXT: orl %eax, %ecx +; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] +; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %eax +; CHECK-WIDE-NEXT: shll $8, %eax +; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %edx +; CHECK-WIDE-NEXT: movzbl %dl, %edx +; CHECK-WIDE-NEXT: orl %eax, %edx +; CHECK-WIDE-NEXT: vpinsrw $0, %edx, %xmm0, %xmm1 +; CHECK-WIDE-NEXT: vpinsrw $1, %ecx, %xmm1, %xmm1 +; CHECK-WIDE-NEXT: vextractf128 $1, %ymm0, %xmm0 +; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] +; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax +; CHECK-WIDE-NEXT: shll $8, %eax +; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %ecx ; CHECK-WIDE-NEXT: movzbl %cl, %ecx ; CHECK-WIDE-NEXT: orl %eax, %ecx ; CHECK-WIDE-NEXT: vpinsrw $2, %ecx, %xmm1, %xmm1 @@ -160,13 +160,13 @@ define <4 x i8> @foo3_4(<4 x float> %src) { ; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %eax ; CHECK-WIDE-NEXT: shll $8, %eax ; CHECK-WIDE-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] -; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %ecx -; CHECK-WIDE-NEXT: movzbl %cl, %ecx -; CHECK-WIDE-NEXT: orl %eax, %ecx -; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] -; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %eax -; CHECK-WIDE-NEXT: shll $8, %eax -; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %edx +; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %ecx +; CHECK-WIDE-NEXT: movzbl %cl, %ecx +; CHECK-WIDE-NEXT: orl %eax, %ecx +; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] +; CHECK-WIDE-NEXT: vcvttss2si %xmm1, %eax +; CHECK-WIDE-NEXT: shll $8, %eax +; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %edx ; CHECK-WIDE-NEXT: movzbl %dl, %edx ; CHECK-WIDE-NEXT: orl %eax, %edx ; CHECK-WIDE-NEXT: vpinsrw $0, %edx, %xmm0, %xmm0 diff --git a/test/CodeGen/X86/vector-shuffle-256-v8.ll b/test/CodeGen/X86/vector-shuffle-256-v8.ll index fa931449420..77aa26ee646 100644 --- a/test/CodeGen/X86/vector-shuffle-256-v8.ll +++ b/test/CodeGen/X86/vector-shuffle-256-v8.ll @@ -145,13 +145,13 @@ define <8 x float> @shuffle_v8f32_70000000(<8 x float> %a, <8 x float> %b) { ret <8 x float> %shuffle } -define <8 x float> @shuffle_v8f32_01014545(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: shuffle_v8f32_01014545: -; ALL: # BB#0: -; ALL-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] -; ALL-NEXT: retq - %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> - ret <8 x float> %shuffle +define <8 x float> @shuffle_v8f32_01014545(<8 x float> %a, <8 x float> %b) { +; ALL-LABEL: shuffle_v8f32_01014545: +; ALL: # BB#0: +; ALL-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] +; ALL-NEXT: retq + %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> + ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_00112233(<8 x float> %a, <8 x float> %b) { @@ -199,13 +199,13 @@ define <8 x float> @shuffle_v8f32_81a3c5e7(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_08080808(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_08080808: -; AVX1: # BB#0: -; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,2,0] -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 -; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] -; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] -; AVX1-NEXT: retq +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,2,0] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8f32_08080808: ; AVX2: # BB#0: @@ -333,13 +333,13 @@ define <8 x float> @shuffle_v8f32_091b2d3f(<8 x float> %a, <8 x float> %b) { ret <8 x float> %shuffle } -define <8 x float> @shuffle_v8f32_09ab1def(<8 x float> %a, <8 x float> %b) { -; AVX1-LABEL: shuffle_v8f32_09ab1def: -; AVX1: # BB#0: -; AVX1-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] -; AVX1-NEXT: retq +define <8 x float> @shuffle_v8f32_09ab1def(<8 x float> %a, <8 x float> %b) { +; AVX1-LABEL: shuffle_v8f32_09ab1def: +; AVX1: # BB#0: +; AVX1-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] +; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8f32_09ab1def: ; AVX2: # BB#0: @@ -423,13 +423,13 @@ define <8 x float> @shuffle_v8f32_00234467(<8 x float> %a, <8 x float> %b) { ret <8 x float> %shuffle } -define <8 x float> @shuffle_v8f32_00224466(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: shuffle_v8f32_00224466: -; ALL: # BB#0: -; ALL-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] -; ALL-NEXT: retq - %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> - ret <8 x float> %shuffle +define <8 x float> @shuffle_v8f32_00224466(<8 x float> %a, <8 x float> %b) { +; ALL-LABEL: shuffle_v8f32_00224466: +; ALL: # BB#0: +; ALL-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] +; ALL-NEXT: retq + %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> + ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_10325476(<8 x float> %a, <8 x float> %b) { @@ -441,13 +441,13 @@ define <8 x float> @shuffle_v8f32_10325476(<8 x float> %a, <8 x float> %b) { ret <8 x float> %shuffle } -define <8 x float> @shuffle_v8f32_11335577(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: shuffle_v8f32_11335577: -; ALL: # BB#0: -; ALL-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] -; ALL-NEXT: retq - %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> - ret <8 x float> %shuffle +define <8 x float> @shuffle_v8f32_11335577(<8 x float> %a, <8 x float> %b) { +; ALL-LABEL: shuffle_v8f32_11335577: +; ALL: # BB#0: +; ALL-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] +; ALL-NEXT: retq + %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> + ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_10235467(<8 x float> %a, <8 x float> %b) { @@ -937,13 +937,13 @@ define <8 x i32> @shuffle_v8i32_70000000(<8 x i32> %a, <8 x i32> %b) { ret <8 x i32> %shuffle } -define <8 x i32> @shuffle_v8i32_01014545(<8 x i32> %a, <8 x i32> %b) { -; AVX1-LABEL: shuffle_v8i32_01014545: -; AVX1: # BB#0: -; AVX1-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] -; AVX1-NEXT: retq -; -; AVX2-LABEL: shuffle_v8i32_01014545: +define <8 x i32> @shuffle_v8i32_01014545(<8 x i32> %a, <8 x i32> %b) { +; AVX1-LABEL: shuffle_v8i32_01014545: +; AVX1: # BB#0: +; AVX1-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] +; AVX1-NEXT: retq +; +; AVX2-LABEL: shuffle_v8i32_01014545: ; AVX2: # BB#0: ; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5] ; AVX2-NEXT: retq @@ -1001,13 +1001,13 @@ define <8 x i32> @shuffle_v8i32_81a3c5e7(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_08080808(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_08080808: -; AVX1: # BB#0: -; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,2,0] -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 -; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] -; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] -; AVX1-NEXT: retq +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,2,0] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8i32_08080808: ; AVX2: # BB#0: @@ -1172,13 +1172,13 @@ define <8 x i32> @shuffle_v8i32_091b2d3f(<8 x i32> %a, <8 x i32> %b) { ret <8 x i32> %shuffle } -define <8 x i32> @shuffle_v8i32_09ab1def(<8 x i32> %a, <8 x i32> %b) { -; AVX1-LABEL: shuffle_v8i32_09ab1def: -; AVX1: # BB#0: -; AVX1-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] -; AVX1-NEXT: retq +define <8 x i32> @shuffle_v8i32_09ab1def(<8 x i32> %a, <8 x i32> %b) { +; AVX1-LABEL: shuffle_v8i32_09ab1def: +; AVX1: # BB#0: +; AVX1-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] +; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8i32_09ab1def: ; AVX2: # BB#0: @@ -1302,13 +1302,13 @@ define <8 x i32> @shuffle_v8i32_00234467(<8 x i32> %a, <8 x i32> %b) { ret <8 x i32> %shuffle } -define <8 x i32> @shuffle_v8i32_00224466(<8 x i32> %a, <8 x i32> %b) { -; AVX1-LABEL: shuffle_v8i32_00224466: -; AVX1: # BB#0: -; AVX1-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] -; AVX1-NEXT: retq -; -; AVX2-LABEL: shuffle_v8i32_00224466: +define <8 x i32> @shuffle_v8i32_00224466(<8 x i32> %a, <8 x i32> %b) { +; AVX1-LABEL: shuffle_v8i32_00224466: +; AVX1: # BB#0: +; AVX1-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] +; AVX1-NEXT: retq +; +; AVX2-LABEL: shuffle_v8i32_00224466: ; AVX2: # BB#0: ; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] ; AVX2-NEXT: retq @@ -1330,13 +1330,13 @@ define <8 x i32> @shuffle_v8i32_10325476(<8 x i32> %a, <8 x i32> %b) { ret <8 x i32> %shuffle } -define <8 x i32> @shuffle_v8i32_11335577(<8 x i32> %a, <8 x i32> %b) { -; AVX1-LABEL: shuffle_v8i32_11335577: -; AVX1: # BB#0: -; AVX1-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] -; AVX1-NEXT: retq -; -; AVX2-LABEL: shuffle_v8i32_11335577: +define <8 x i32> @shuffle_v8i32_11335577(<8 x i32> %a, <8 x i32> %b) { +; AVX1-LABEL: shuffle_v8i32_11335577: +; AVX1: # BB#0: +; AVX1-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: shuffle_v8i32_11335577: ; AVX2: # BB#0: ; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] ; AVX2-NEXT: retq