From: Evan Cheng Date: Wed, 13 Jul 2011 01:33:00 +0000 (+0000) Subject: Add an entry. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=3b737081e49ef7d640d50285b6cb5f686c75f63d;p=oota-llvm.git Add an entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135024 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt index 8ba9a27e95c..2f6842e8cb6 100644 --- a/lib/Target/ARM/README.txt +++ b/lib/Target/ARM/README.txt @@ -681,3 +681,21 @@ is compiled and optimized to: str r1, [r0] //===---------------------------------------------------------------------===// + +Improve codegen for select's: +if (x != 0) x = 1 +if (x == 1) x = 1 + +ARM codegen used to look like this: + mov r1, r0 + cmp r1, #1 + mov r0, #0 + moveq r0, #1 + +The naive lowering select between two different values. It should recognize the +test is equality test so it's more a conditional move rather than a select: + cmp r0, #1 + movne r0, #0 + +Currently this is a ARM specific dag combine. We probably should make it into a +target-neutral one.