From: Evan Cheng Date: Mon, 1 Sep 2008 07:48:18 +0000 (+0000) Subject: ldm / stm instruction encodings. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=3c2ee4939b250963fa06483b4c082b279279f4e7;p=oota-llvm.git ldm / stm instruction encodings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55599 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 10153f68d02..16fb40505e8 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -577,11 +577,33 @@ class AI3sthpo opcod, dag oops, dag iops, Format f, string opc, class AI4 opcod, dag oops, dag iops, Format f, string opc, string asm, list pattern> : I; -class AXI4 opcod, dag oops, dag iops, Format f, string asm, + asm, "", pattern> { + let Inst{25-27} = 0x4; +} +class AXI4ld opcod, dag oops, dag iops, Format f, string asm, list pattern> : XI; + "", pattern> { + let Inst{20} = 1; // L bit + let Inst{22} = 0; // S bit + let Inst{25-27} = 0x4; +} +class AXI4ldpc opcod, dag oops, dag iops, Format f, string asm, + list pattern> + : XI { + let Inst{20} = 1; // L bit + let Inst{22} = 1; // S bit + let Inst{25-27} = 0x4; +} +class AXI4st opcod, dag oops, dag iops, Format f, string asm, + list pattern> + : XI { + let Inst{20} = 0; // L bit + let Inst{22} = 0; // S bit + let Inst{25-27} = 0x4; +} // BR_JT instructions diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index dbcc4b19b80..cfc0625b625 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -523,7 +523,7 @@ let isReturn = 1, isTerminator = 1 in // FIXME: $dst1 should be a def. But the extra ops must be in the end of the // operand list. let isReturn = 1, isTerminator = 1 in - def LDM_RET : AXI4<0x0, (outs), + def LDM_RET : AXI4ldpc<0x0, (outs), (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops), LdFrm, "ldm${p}${addr:submode} $addr, $dst1", []>; @@ -725,13 +725,13 @@ def STRB_POST: AI2stbpo<0x1, (outs GPR:$base_wb), // FIXME: $dst1 should be a def. let mayLoad = 1 in -def LDM : AXI4<0x0, (outs), +def LDM : AXI4ld<0x0, (outs), (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops), LdFrm, "ldm${p}${addr:submode} $addr, $dst1", []>; let mayStore = 1 in -def STM : AXI4<0x0, (outs), +def STM : AXI4st<0x0, (outs), (ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops), StFrm, "stm${p}${addr:submode} $addr, $src1", []>;