From: chenxing <chenxing@rock-chips.com>
Date: Wed, 3 Apr 2013 02:17:35 +0000 (+0800)
Subject: rk3188: gpu use switch pll to support 594M at gpll, change cpll to 798M
X-Git-Tag: firefly_0821_release~7299
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=3d09c90a2383d69668830205f605a52faa17e28a;p=firefly-linux-kernel-4.4.55.git

rk3188: gpu use switch pll to support 594M at gpll, change cpll to 798M
---

diff --git a/arch/arm/mach-rk3188/clock_data.c b/arch/arm/mach-rk3188/clock_data.c
index 72da5601d357..c79168aa50d3 100755
--- a/arch/arm/mach-rk3188/clock_data.c
+++ b/arch/arm/mach-rk3188/clock_data.c
@@ -1375,7 +1375,7 @@ static struct clk aclk_gpu = {
 	.mode		= gate_mode,
 	.recalc		= clksel_recalc_div,
 	.round_rate	= clk_freediv_round_autosel_parents_rate,
-	.set_rate	= clksel_set_rate_freediv,
+	.set_rate	= clkset_rate_freediv_autosel_parents,
 	.clksel_con 	= CRU_CLKSELS_CON(34),
 	.gate_idx	= CLK_GATE_ACLK_GPU,
 	CRU_DIV_SET(0x1f, 0, 32),
diff --git a/arch/arm/mach-rk3188/include/mach/board.h b/arch/arm/mach-rk3188/include/mach/board.h
index 294f021625c9..028ade179a46 100644
--- a/arch/arm/mach-rk3188/include/mach/board.h
+++ b/arch/arm/mach-rk3188/include/mach/board.h
@@ -76,9 +76,9 @@ enum _codec_pll {
 #if (RK30_CLOCKS_DEFAULT_FLAGS&CLK_FLG_UART_1_3M)
 #define codec_pll_default codec_pll_768mhz
 #else
-#define codec_pll_default codec_pll_1200mhz
+#define codec_pll_default codec_pll_798mhz
 #endif
-#define periph_pll_default periph_pll_297mhz
+#define periph_pll_default periph_pll_594mhz
 
 #endif