From: Colin Cross Date: Fri, 7 Jan 2011 04:16:10 +0000 (-0800) Subject: video: tegra: host: Disable 3d powergating X-Git-Tag: firefly_0821_release~9833^2~73^2 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=3fd40dad57b28da176fd62dabfcd3d63578879ed;p=firefly-linux-kernel-4.4.55.git video: tegra: host: Disable 3d powergating It is possible for the 3d block to generate an invalid memory request during the power up sequence in some cases. Workaround is to disable 3d block power gating. Change-Id: I10efad1f7d3dada7cd3fe18e268f06d60bdbab67 Signed-off-by: Colin Cross --- diff --git a/drivers/video/tegra/host/nvhost_acm.c b/drivers/video/tegra/host/nvhost_acm.c index c4ac035a26ec..a4bbce2b6f1d 100644 --- a/drivers/video/tegra/host/nvhost_acm.c +++ b/drivers/video/tegra/host/nvhost_acm.c @@ -30,6 +30,8 @@ #define ACM_TIMEOUT 1*HZ +#define DISABLE_3D_POWERGATING + void nvhost_module_busy(struct nvhost_module *mod) { mutex_lock(&mod->lock); @@ -139,6 +141,21 @@ int nvhost_module_init(struct nvhost_module *mod, const char *name, mod->parent = parent; mod->powered = false; mod->powergate_id = get_module_powergate_id(name); + +#ifdef DISABLE_3D_POWERGATING + /* + * It is possible for the 3d block to generate an invalid memory + * request during the power up sequence in some cases. Workaround + * is to disable 3d block power gating. + */ + if (mod->powergate_id == TEGRA_POWERGATE_3D) { + tegra_powergate_sequence_power_up(mod->powergate_id, + mod->clk[0]); + clk_disable(mod->clk[0]); + mod->powergate_id = -1; + } +#endif + mutex_init(&mod->lock); init_waitqueue_head(&mod->idle); INIT_DELAYED_WORK(&mod->powerdown, powerdown_handler);