From: Mark Yao Date: Thu, 6 Apr 2017 03:06:56 +0000 (+0800) Subject: drm/rockchip: vop: support CRTC_STEREO_DOUBLE mode X-Git-Tag: firefly_0821_release~111 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=40197330626f47d527373407492011fdc707d0ab;hp=26a079fe5cd118e5c9f98cd51e849ac34b34e8de;p=firefly-linux-kernel-4.4.55.git drm/rockchip: vop: support CRTC_STEREO_DOUBLE mode Change-Id: Ic9905248491a2d728da782d6cfa9679ca50dd6c4 Signed-off-by: Mark Yao --- diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index e21b8e28485b..167058470675 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1465,20 +1465,23 @@ static const struct rockchip_crtc_funcs private_crtc_funcs = { static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) + struct drm_display_mode *adj_mode) { struct vop *vop = to_vop(crtc); const struct vop_data *vop_data = vop->data; - int request_clock = mode->clock; if (mode->hdisplay > vop_data->max_output.width || mode->vdisplay > vop_data->max_output.height) return false; + drm_mode_set_crtcinfo(adj_mode, + CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE); + if (mode->flags & DRM_MODE_FLAG_DBLCLK) - request_clock *= 2; - adjusted_mode->crtc_clock = - clk_round_rate(vop->dclk, request_clock * 1000) / 1000; + adj_mode->crtc_clock *= 2; + + adj_mode->crtc_clock = + clk_round_rate(vop->dclk, adj_mode->crtc_clock * 1000) / 1000; return true; }