From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Thu, 3 Sep 2015 14:28:37 +0000 (+0100)
Subject: Merge branches 'cleanup', 'fixes', 'misc', 'omap-barrier' and 'uaccess' into for... 
X-Git-Tag: firefly_0821_release~176^2~1151^2~1
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=40d3f02851577da27b5cbb1538888301245ef1e7;p=firefly-linux-kernel-4.4.55.git

Merge branches 'cleanup', 'fixes', 'misc', 'omap-barrier' and 'uaccess' into for-linus
---

40d3f02851577da27b5cbb1538888301245ef1e7
diff --cc arch/arm/Kconfig
index a750c1425c3a,1c5021002fe4,1bcda7cb2e04,a750c1425c3a,e15d5ed4d5f1..345882856287
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@@@@ -1693,7 -1693,13 -1696,7 -1693,7 -1693,22 +1696,28 @@@@@@ config HIGHME
     config HIGHPTE
     	bool "Allocate 2nd-level pagetables from highmem"
     	depends on HIGHMEM
+ +++	help
+ +++	  The VM uses one page of physical memory for each page table.
+ +++	  For systems with a lot of processes, this can use a lot of
+ +++	  precious low memory, eventually leading to low memory being
+ +++	  consumed by page tables.  Setting this option will allow
+ +++	  user-space 2nd level page tables to reside in high memory.
+ ++ 
++++ config CPU_SW_DOMAIN_PAN
++++ 	bool "Enable use of CPU domains to implement privileged no-access"
++++ 	depends on MMU && !ARM_LPAE
++++ 	default y
++++ 	help
++++ 	  Increase kernel security by ensuring that normal kernel accesses
++++ 	  are unable to access userspace addresses.  This can help prevent
++++ 	  use-after-free bugs becoming an exploitable privilege escalation
++++ 	  by ensuring that magic values (such as LIST_POISON) will always
++++ 	  fault when dereferenced.
++++ 
++++ 	  CPUs with low-vector mappings use a best-efforts implementation.
++++ 	  Their lower 1MB needs to remain accessible for the vectors, but
++++ 	  the remainder of userspace will become appropriately inaccessible.
 +   
     config HW_PERF_EVENTS
     	bool "Enable hardware performance counter support for perf events"
     	depends on PERF_EVENTS
diff --cc arch/arm/include/asm/uaccess.h
index 4cf54ebe408a,74b17d09ef7a,74b17d09ef7a,74b17d09ef7a,01bae13b2cea..8cc85a4ebec2
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@@@@@ -379,11 -391,11 -391,11 -391,11 -429,12 +417,12 @@@@@@ do {									
     	case 8:	__put_user_asm_dword(__pu_val, __pu_addr, err);	break;	\
     	default: __put_user_bad();					\
     	}								\
++++ 	uaccess_restore(__ua_flags);					\
     } while (0)
     
 ----#define __put_user_asm_byte(x, __pu_addr, err)			\
 ++++#define __put_user_asm(x, __pu_addr, err, instr)		\
     	__asm__ __volatile__(					\
 ----	"1:	" TUSER(strb) "	%1,[%2],#0\n"			\
 ++++	"1:	" TUSER(instr) " %1, [%2], #0\n"		\
     	"2:\n"							\
     	"	.pushsection .text.fixup,\"ax\"\n"		\
     	"	.align	2\n"					\
diff --cc arch/arm/mm/mmu.c
index 6ca7d9aa896f,870838a46d52,fb9e817d08bb,6ca7d9aa896f,a016de248034..7cd15143a507
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@@@@@ -1494,7 -1500,8 -1567,8 -1494,7 -1494,7 +1573,9 @@@@@@ void __init paging_init(const struct ma
     	build_mem_type_table();
     	prepare_page_table();
     	map_lowmem();
+ +++	memblock_set_current_limit(arm_lowmem_limit);
     	dma_contiguous_remap();
++ ++	early_fixmap_shutdown();
     	devicemaps_init(mdesc);
     	kmap_init();
     	tcm_init();