From: Andrew Trick Date: Thu, 14 Jun 2012 17:48:49 +0000 (+0000) Subject: misched: disable SSA check pending PR13112. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=42120a2c5546f0eca9fdedf860b6a222e279971a;p=oota-llvm.git misched: disable SSA check pending PR13112. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158461 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp index 24b9cd0b45f..110f478f48e 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -413,8 +413,10 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { // SSA defs do not have output/anti dependencies. // The current operand is a def, so we have at least one. - if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end()) - return; + // + // FIXME: This optimization is disabled pending PR13112. + //if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end()) + // return; // Add output dependence to the next nearest def of this vreg. //