From: Ruchira Sasanka <sasanka@students.uiuc.edu>
Date: Sat, 15 Sep 2001 20:16:41 +0000 (+0000)
Subject: -modified machine operand class - took regNum out of union to set regNum after
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=427a5273113274ee35cff78534dba2ae812c79ce;p=oota-llvm.git

-modified machine operand class - took regNum out of union to set regNum after
retister allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@594 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 8e0a86e4a08..cb807292292 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -79,13 +79,12 @@ private:
 				// ConstantVal for a non-address immediate.
 				// Virtual register for an SSA operand,
 				// including hidden operands required for
-				// the generated machine code.
-    
-    unsigned int regNum;	// register number for an explicit register
-  
+				// the generated machine code.     
     int64_t immedVal;		// constant value for an explicit constant
   };
 
+  unsigned int regNum;	        // register number for an explicit register
+                                // will be set for a value after reg allocation
   bool isDef;                   // is this a defition for the value
                                 // made public for faster access
   
@@ -141,6 +140,13 @@ private:
 
 public:
 
+  // replaces the Value with its corresponding physical register afeter
+  // register allocation is complete
+  void setRegForValue(unsigned reg) {
+    assert(opType == MO_VirtualRegister || opType == MO_CCRegister);
+    regNum = reg;
+  }
+
  
 };