From: Michel Dänzer <michel.daenzer@amd.com>
Date: Wed, 18 Sep 2013 16:23:51 +0000 (+0200)
Subject: drm/radeon/cik: Add tiling mode index for 1D tiled depth/stencil surfaces
X-Git-Tag: firefly_0821_release~176^2~5230^2~1^2~13
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=42baf21d91d4f52f5b9a4d11dc8e7b1e3b93de7c;p=firefly-linux-kernel-4.4.55.git

drm/radeon/cik: Add tiling mode index for 1D tiled depth/stencil surfaces

CIK uses a different index for 1D DST surfaces compared to SI.  Expose
the new index so libdrm_radeon can use it properly for userspace
drivers.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index fa8b3adf9ffb..46d41e8b0dcc 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -1007,4 +1007,6 @@ struct drm_radeon_info {
 #define SI_TILE_MODE_DEPTH_STENCIL_2D_4AA	3
 #define SI_TILE_MODE_DEPTH_STENCIL_2D_8AA	2
 
+#define CIK_TILE_MODE_DEPTH_STENCIL_1D		5
+
 #endif