From: Luca Tettamanti <kronos.it@gmail.com>
Date: Mon, 28 Dec 2009 21:53:05 +0000 (+0100)
Subject: drm/radeon/kms: rs600: use correct mask for SW interrupt
X-Git-Tag: firefly_0821_release~9833^2~3227^2~55^2
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=43b19f161c7a9941e3aa7db0e3ee19b93980e3d7;p=firefly-linux-kernel-4.4.55.git

drm/radeon/kms: rs600: use correct mask for SW interrupt

The mask happens to be the same, but the IH is reading the status, not the
not the control register.

Signed-off-by: Luca Tettamanti <kronos.it@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 4f8ea4260572..4245218e954f 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -396,7 +396,7 @@ int rs600_irq_process(struct radeon_device *rdev)
 	}
 	while (status || r500_disp_int) {
 		/* SW interrupt */
-		if (G_000040_SW_INT_EN(status))
+		if (G_000044_SW_INT(status))
 			radeon_fence_process(rdev);
 		/* Vertical blank interrupts */
 		if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))