From: chenxing <chenxing@rock-chips.com>
Date: Wed, 15 Aug 2012 12:05:59 +0000 (+0800)
Subject: rk2928:sdk: use lowest rate when all div rates are higher then request
X-Git-Tag: firefly_0821_release~8912^2~3^2
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=43e39f9617ad5a24b8b38ebfe625f8ebbe2ccd1e;p=firefly-linux-kernel-4.4.55.git

rk2928:sdk: use lowest rate when all div rates are higher then request
---

diff --git a/arch/arm/mach-rk2928/clock_data.c b/arch/arm/mach-rk2928/clock_data.c
index 8b311cc95776..50eb07b4e6f4 100644
--- a/arch/arm/mach-rk2928/clock_data.c
+++ b/arch/arm/mach-rk2928/clock_data.c
@@ -62,6 +62,7 @@ struct pll_clk_set {
 #define CLKDATA_LOG(fmt, args...) do {} while(0)
 #endif
 #define CLKDATA_ERR(fmt, args...) printk(KERN_ERR "CLKDATA_ERR:\t"fmt, ##args)
+#define CLKDATA_WARNNING(fmt, args...) printk("CLKDATA_WANNING:\t"fmt, ##args)
 
 #define cru_readl(offset)	readl_relaxed(RK2928_CRU_BASE + offset)
 #define cru_writel(v, offset)	do { writel_relaxed(v, RK2928_CRU_BASE + offset); dsb(); } while (0)
@@ -330,6 +331,12 @@ static int clksel_set_rate_freediv(struct clk *clk, unsigned long rate)
 			CLKDATA_DBG("clksel_set_rate_freediv for clock %s to rate %ld (div %d)\n", clk->name, rate, div + 1);
 			return 0;
 		}
+		if (div == clk->div_max - 1) {
+			CLKDATA_WARNNING("%s clk=%s, div=%u, rate=%lu, new_rate=%u\n",
+					__func__, clk->name, div, rate, new_rate);
+			set_cru_bits_w_msk(div,clk->div_mask,clk->div_shift,clk->clksel_con);
+			return 0;
+		}
 	}
 	return -ENOENT;
 }