From: xiaoyao <xiaoyao@rock-chips.com>
Date: Thu, 22 Sep 2016 09:33:47 +0000 (+0800)
Subject: UPSTREAM: ARM64: dts: rockchip: update rk3399.dtsi for emmc&phy
X-Git-Tag: firefly_0821_release~1492
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=44c69f1dc01c3e073d515073066029fcdd39e7fe;p=firefly-linux-kernel-4.4.55.git

UPSTREAM: ARM64: dts: rockchip: update rk3399.dtsi for emmc&phy

Change-Id: I97948c250f63423c5a7f305cfaa3a10b190f736f
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 5319b88363fe..5dbcaf27858b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -328,15 +328,6 @@
 		status = "disabled";
 	};
 
-	emmc_phy: phy {
-		compatible = "rockchip,rk3399-emmc-phy";
-		reg-offset = <0xf780>;
-		#phy-cells = <0>;
-		rockchip,grf = <&grf>;
-		ctrl-base = <0xfe330000>;
-		status = "disabled";
-	};
-
 	sdio0: dwmmc@fe310000 {
 		compatible = "rockchip,rk3399-dw-mshc",
 			     "rockchip,rk3288-dw-mshc";
@@ -369,11 +360,13 @@
 		compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
 		reg = <0x0 0xfe330000 0x0 0x10000>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
-		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
-		clock-names = "clk_xin", "clk_ahb";
+		arasan,soc-ctl-syscon = <&grf>;
 		assigned-clocks = <&cru SCLK_EMMC>;
-		assigned-clock-parents = <&cru PLL_CPLL>;
 		assigned-clock-rates = <200000000>;
+		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
+		clock-names = "clk_xin", "clk_ahb";
+		clock-output-names = "emmc_cardclock";
+		#clock-cells = <0>;
 		phys = <&emmc_phy>;
 		phy-names = "phy_arasan";
 		power-domains = <&power RK3399_PD_EMMC>;
@@ -1361,6 +1354,15 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 
+		emmc_phy: phy@f780 {
+			compatible = "rockchip,rk3399-emmc-phy";
+			reg = <0xf780 0x24>;
+			clocks = <&sdhci>;
+			clock-names = "emmcclk";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
 		u2phy0: usb2-phy@e450 {
 			compatible = "rockchip,rk3399-usb2phy";
 			reg = <0xe450 0x10>;