From: Matthias Braun Date: Fri, 26 Jun 2015 00:26:49 +0000 (+0000) Subject: Revert "X86: Reject register operands with obvious type mismatches." X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=48362d63cfd6079b2111c27a4cdc7b775225e857;p=oota-llvm.git Revert "X86: Reject register operands with obvious type mismatches." Revert until http://llvm.org/PR23955 is investigated. This reverts commit r239309. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240746 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 105c2ddfd9e..47d107607e6 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -25583,10 +25583,6 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, Res.first = DestReg; Res.second = &X86::GR64RegClass; } - } else if (VT != MVT::Other) { - // Type mismatch and not a clobber: Return an error; - Res.first = 0; - Res.second = nullptr; } } else if (Res.second == &X86::FR32RegClass || Res.second == &X86::FR64RegClass || @@ -25612,15 +25608,6 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, Res.second = &X86::VR256RegClass; else if (X86::VR512RegClass.hasType(VT)) Res.second = &X86::VR512RegClass; - else if (VT != MVT::Other) { - // Type mismatch and not a clobber: Return an error; - Res.first = 0; - Res.second = nullptr; - } - } else if (VT != MVT::Other) { - // Type mismatch and not a clobber: Return an error; - Res.first = 0; - Res.second = nullptr; } return Res; diff --git a/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll b/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll deleted file mode 100644 index 016e2d261ee..00000000000 --- a/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: not llc -no-integrated-as %s -o - 2> %t1 -; RUN: FileCheck %s < %t1 -target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" -target triple = "x86_64--" - -; CHECK: error: couldn't allocate output register for constraint '{ax}' -define i128 @blup() { - %v = tail call i128 asm "", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i128 0) - ret i128 %v -}