From: James Wylder Date: Fri, 11 Mar 2011 20:42:56 +0000 (-0600) Subject: [ARM] tegra: stingray: change display EMC clock rate X-Git-Tag: firefly_0821_release~9834^2~50 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=4b2d0d6672ee6eb43ea9659c76eba026bd0992fd;p=firefly-linux-kernel-4.4.55.git [ARM] tegra: stingray: change display EMC clock rate With the nVidia recommended clock rates of 300, 150, and 50, the current value (400000000 internal rate or 200 MHz external clock rate) will round up to full speed rather than use the intended middle rate(300000000 or 150 MHz external memory). This saves 10 mA at the battery, when the display is on but during low work loads. Change-Id: I291d758166a0e3747163c1831933da01fadb8e69 Signed-off-by: James Wylder --- diff --git a/arch/arm/mach-tegra/board-stingray-panel.c b/arch/arm/mach-tegra/board-stingray-panel.c index 4720129691f2..bf06c700b634 100644 --- a/arch/arm/mach-tegra/board-stingray-panel.c +++ b/arch/arm/mach-tegra/board-stingray-panel.c @@ -331,7 +331,7 @@ static struct tegra_dc_out stingray_disp1_out = { static struct tegra_dc_platform_data stingray_disp1_pdata = { .flags = TEGRA_DC_FLAG_ENABLED, - .emc_clk_rate = 400000000, + .emc_clk_rate = 300000000, .default_out = &stingray_disp1_out, .fb = &stingray_fb_data, };