From: Dan Gohman Date: Tue, 7 Apr 2009 20:40:11 +0000 (+0000) Subject: Don't attempt to handle aggregate argument values in FastISel; let X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=4fd552880c9f42f117bd79929ea0179f99bd6bb7;p=oota-llvm.git Don't attempt to handle aggregate argument values in FastISel; let SelectionDAG do those. This fixes PR3955. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68546 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index 6f09f794ea4..eefe8a2884a 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -57,11 +57,15 @@ using namespace llvm; unsigned FastISel::getRegForValue(Value *V) { - MVT::SimpleValueType VT = TLI.getValueType(V->getType()).getSimpleVT(); + MVT RealVT = TLI.getValueType(V->getType(), /*AllowUnknown=*/true); + // Don't handle non-simple values in FastISel. + if (!RealVT.isSimple()) + return 0; // Ignore illegal types. We must do this before looking up the value // in ValueMap because Arguments are given virtual registers regardless // of whether FastISel can handle them. + MVT::SimpleValueType VT = RealVT.getSimpleVT(); if (!TLI.isTypeLegal(VT)) { // Promote MVT::i1 to a legal type though, because it's common and easy. if (VT == MVT::i1) diff --git a/test/CodeGen/X86/fast-isel-bail.ll b/test/CodeGen/X86/fast-isel-bail.ll new file mode 100644 index 00000000000..fa65d209b2c --- /dev/null +++ b/test/CodeGen/X86/fast-isel-bail.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=x86 -fast + +; This file is for regression tests for cases where FastISel needs +; to gracefully bail out and let SelectionDAGISel take over. + + type { i64, i8* } ; type %0 + +declare void @bar(%0) + +define fastcc void @foo() nounwind { +entry: + call void @bar(%0 zeroinitializer) + unreachable +}