From: Luowei <lw@rock-chips.com>
Date: Sun, 28 Sep 2014 01:42:41 +0000 (+0800)
Subject: 1.print spi debug infomation to /proc/kmsg;
X-Git-Tag: firefly_0821_release~4639
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=51077c0487b14ce63890029b80045631c6392d00;p=firefly-linux-kernel-4.4.55.git

1.print spi debug infomation to /proc/kmsg;
2.open tx and rx interrupt later;
3.improve software proccess for spi dma;
---

diff --git a/drivers/spi/spi-rockchip-core.c b/drivers/spi/spi-rockchip-core.c
index 4626b9f00fda..87b1df613aee 100755
--- a/drivers/spi/spi-rockchip-core.c
+++ b/drivers/spi/spi-rockchip-core.c
@@ -425,9 +425,8 @@ static void giveback(struct dw_spi *dws)
 	if (next_msg && next_msg->spi != msg->spi)
 	next_msg = NULL;
 	
-	spi_finalize_current_message(dws->master);
 	dws->cur_chip = NULL;
-
+	spi_finalize_current_message(dws->master);
 	
 	DBG_SPI("%s:line=%d,tx_left=%d\n",__func__,__LINE__, (dws->tx_end - dws->tx) / dws->n_bytes);
 }
@@ -717,7 +716,6 @@ static void pump_transfers(unsigned long data)
 		dws->transfer_handler = interrupt_transfer;
 	}
 
-
 	/*
 	 * Reprogram registers only if
 	 *	1. chip select changes
@@ -731,11 +729,12 @@ static void pump_transfers(unsigned long data)
 		if (dw_readl(dws, SPIM_CTRLR0) != cr0)
 			dw_writel(dws, SPIM_CTRLR0, cr0);
 
+
 		spi_set_clk(dws, clk_div ? clk_div : chip->clk_div);		
 		spi_chip_sel(dws, spi->chip_select);
 
-        dw_writew(dws, SPIM_CTRLR1, dws->len-1);
-		
+		dw_writew(dws, SPIM_CTRLR1, dws->len-1);
+
 		if (txint_level != dw_readl(dws, SPIM_TXFTLR))
 			dw_writew(dws, SPIM_TXFTLR, txint_level);
 			
@@ -744,10 +743,6 @@ static void pump_transfers(unsigned long data)
 			dw_writew(dws, SPIM_RXFTLR, rxint_level);
 			DBG_SPI("%s:rxint_level=%d\n",__func__,rxint_level);
 		}
-		/* Set the interrupt mask, for poll mode just diable all int */
-		spi_mask_intr(dws, 0xff);
-		if (imask)
-			spi_umask_intr(dws, imask);
 
 		/* setup DMA related registers */
 		if(dws->dma_mapped)
@@ -773,12 +768,22 @@ static void pump_transfers(unsigned long data)
 			
 		}
 		
-		spi_enable_chip(dws, 1);	
+		spi_enable_chip(dws, 1);
+
+		DBG_SPI("%s:ctrl0=0x%x\n",__func__,dw_readw(dws, SPIM_CTRLR0));
+
+		/* Set the interrupt mask, for poll mode just diable all int */
+		spi_mask_intr(dws, 0xff);
+		if (imask)
+			spi_umask_intr(dws, imask);
 		
 		if (cs_change)
 			dws->prev_chip = chip;
 
-		DBG_SPI("%s:ctrl0=0x%x\n",__func__,dw_readw(dws, SPIM_CTRLR0));
+	}
+	else
+	{
+		printk("%s:warning tx and rx is null\n",__func__);
 	}
 
 	/*dma should be ready before spi_enable_chip*/
diff --git a/drivers/spi/spi-rockchip-core.h b/drivers/spi/spi-rockchip-core.h
index 0bb9e5753d32..9fa458c13cd3 100755
--- a/drivers/spi/spi-rockchip-core.h
+++ b/drivers/spi/spi-rockchip-core.h
@@ -7,7 +7,7 @@
 
 
 #if 1
-#define DBG_SPI(x...)  if(atomic_read(&dws->debug_flag) == 1) printk(x)
+#define DBG_SPI(x...)  if(atomic_read(&dws->debug_flag) == 1) printk(KERN_DEBUG x)
 #else
 #define DBG_SPI(x...)
 #endif
diff --git a/drivers/spi/spi-rockchip-dma.c b/drivers/spi/spi-rockchip-dma.c
index cc0d4494b63c..11468e04dbe3 100755
--- a/drivers/spi/spi-rockchip-dma.c
+++ b/drivers/spi/spi-rockchip-dma.c
@@ -150,10 +150,10 @@ static void dw_spi_dma_rxcb(void *arg)
 	/* If the other done */
 	if (!(dws->state & TXBUSY))
 	{
-		complete(&dws->xfer_completion);	
-		DBG_SPI("%s:complete\n", __FUNCTION__);		
 		//DMA could not lose intterupt
 		dw_spi_xfer_done(dws);
+		complete(&dws->xfer_completion);
+		DBG_SPI("%s:complete\n", __FUNCTION__);
 	}
 
 }
@@ -184,13 +184,12 @@ static void dw_spi_dma_txcb(void *arg)
 	spin_unlock_irqrestore(&dws->lock, flags);
 	
 	/* If the other done */
-	if (!(dws->state & RXBUSY)) 
+	if (!(dws->state & RXBUSY))
 	{
-		complete(&dws->xfer_completion);		
-		DBG_SPI("%s:complete\n", __FUNCTION__);
-
 		//DMA could not lose intterupt
 		dw_spi_xfer_done(dws);
+		complete(&dws->xfer_completion);
+		DBG_SPI("%s:complete\n", __FUNCTION__);
 	}
 
 }