From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Mon, 25 Apr 2016 02:35:23 +0000 (+0800)
Subject: ARM64: dts: rk3399: assign clk parent and rate for SCLK_EMMC
X-Git-Tag: firefly_0821_release~2736
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=511074f3dca02c67c72bfb90854e2e38ad06b8c0;p=firefly-linux-kernel-4.4.55.git

ARM64: dts: rk3399: assign clk parent and rate for SCLK_EMMC

Let's assign clk parent and rate for SCLK_EMMC to meet the
requiremen.

Change-Id: I3730a2124494da51717b1756f488f9df5bcd6423
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e7d7dea724e3..8ec95c76c4be 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -325,6 +325,9 @@
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
 		clock-names = "clk_xin", "clk_ahb";
+		assigned-clocks = <&cru SCLK_EMMC>;
+		assigned-clock-parents = <&cru PLL_CPLL>;
+		assigned-clock-rates = <200000000>;
 		phys = <&emmc_phy>;
 		phy-names = "phy_arasan";
 		status = "disabled";