From: Hal Finkel Date: Wed, 1 Apr 2015 00:40:48 +0000 (+0000) Subject: [PowerPC] FastISel can't handle i1 return values when using CR bits X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=54ab6ce385acd8bcfdb235fc171dea255b490467;p=oota-llvm.git [PowerPC] FastISel can't handle i1 return values when using CR bits Under normal circumstances, use of CR bits is disabled when running at -O0, but it is enabled by default otherwise, and if you have optnone functions, they'll still generally be generated with crbits turned on (because nothing else turns them off). FastISel can't handle most things dealing with i1 values when using CR bits, and checks for that, but was not checking the return type on functions; we can't fast-isel function calls with i1 return values either when using CR bits for boolean values. Fixes PR22664. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233775 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPCFastISel.cpp b/lib/Target/PowerPC/PPCFastISel.cpp index fbd7b6d7f1c..8d3f308ab96 100644 --- a/lib/Target/PowerPC/PPCFastISel.cpp +++ b/lib/Target/PowerPC/PPCFastISel.cpp @@ -1444,6 +1444,9 @@ bool PPCFastISel::fastLowerCall(CallLoweringInfo &CLI) { else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && RetVT != MVT::i8) return false; + else if (RetVT == MVT::i1 && PPCSubTarget->useCRBits()) + // We can't handle boolean returns when CR bits are in use. + return false; // FIXME: No multi-register return values yet. if (RetVT != MVT::isVoid && RetVT != MVT::i8 && RetVT != MVT::i16 && diff --git a/test/CodeGen/PowerPC/optnone-crbits-i1-ret.ll b/test/CodeGen/PowerPC/optnone-crbits-i1-ret.ll new file mode 100644 index 00000000000..745a038d6ce --- /dev/null +++ b/test/CodeGen/PowerPC/optnone-crbits-i1-ret.ll @@ -0,0 +1,37 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-bgq-linux" + +declare zeroext i1 @ri1() +declare void @se1() +declare void @se2() + +define void @test() #0 { +entry: + %b = call zeroext i1 @ri1() + br label %next + +; CHECK-LABEL: @test +; CHECK: bl ri1 +; CHECK-NEXT: nop +; CHECK: andi. 3, 3, 1 + +next: + br i1 %b, label %case1, label %case2 + +case1: + call void @se1() + br label %end + +case2: + call void @se2() + br label %end + +end: + ret void + +; CHECK: blr +} + +attributes #0 = { noinline optnone } +