From: Chris Zhong Date: Sat, 19 Mar 2016 03:33:09 +0000 (+0800) Subject: ARM64: dts: rk3399: add mipi node X-Git-Tag: firefly_0821_release~2913 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=553b1a8a0a59796154dba72c1ddd986ac1112a2c;p=firefly-linux-kernel-4.4.55.git ARM64: dts: rk3399: add mipi node Change-Id: I06562ff3b62efa38f84ac892513725dcf4559471 Signed-off-by: Chris Zhong Signed-off-by: Mark Yao --- diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index f548fd4cdb11..e6137c57359e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1022,6 +1022,11 @@ vopl_out: port { #address-cells = <1>; #size-cells = <0>; + + vopl_out_mipi: endpoint@1 { + reg = <1>; + remote-endpoint = <&mipi_in_vopl>; + }; }; }; @@ -1048,6 +1053,11 @@ vopb_out: port { #address-cells = <1>; #size-cells = <0>; + + vopb_out_mipi: endpoint@1 { + reg = <1>; + remote-endpoint = <&mipi_in_vopb>; + }; }; }; @@ -1060,6 +1070,39 @@ status = "disabled"; }; + mipi_dsi: mipi@ff960000 { + compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0x0 0xff960000 0x0 0x8000>; + interrupts = ; + clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, + <&cru SCLK_DPHY_TX0_CFG>; + clock-names = "ref", "pclk", "phy_cfg"; + rockchip,grf = <&grf>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mipi_in: port { + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_mipi>; + }; + mipi_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_mipi>; + }; + }; + }; + }; + display_subsystem: display-subsystem { compatible = "rockchip,display-subsystem"; ports = <&vopl_out>, <&vopb_out>;