From: Finn Thain Date: Sun, 12 Jan 2014 13:56:38 +0000 (+1100) Subject: m68k/mac: Make SCC reset work more reliably X-Git-Tag: firefly_0821_release~176^2~4659^2 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=56931d73697c99ecf7aba6ae86c94d3a2d15d596;p=firefly-linux-kernel-4.4.55.git m68k/mac: Make SCC reset work more reliably For SCC initialization we cannot assume that the control register is in the correct state to accept a register pointer. So first read from the control register in order to "sync" up. Signed-off-by: Finn Thain Signed-off-by: Geert Uytterhoeven --- diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S index 7d7913f5dce3..4c99bab7e664 100644 --- a/arch/m68k/kernel/head.S +++ b/arch/m68k/kernel/head.S @@ -2915,7 +2915,9 @@ func_start serial_init,%d0/%d1/%a0/%a1 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B) movel %pc@(L(mac_sccbase)),%a0 - /* Reset SCC device */ + /* Reset SCC register pointer */ + moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0 + /* Reset SCC device: write register pointer then register value */ moveb #9,%a0@(mac_scc_cha_a_ctrl_offset) moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset) /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */